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https://github.com/brain-hackers/u-boot-brain
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ppc4xx: Only print ECC related info when the error bis are set
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
e36220a4ba
commit
27a528fb41
@ -147,6 +147,8 @@ MachineCheckException(struct pt_regs *regs)
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unsigned long fixup, val;
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unsigned long fixup, val;
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#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
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#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
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u32 value2;
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u32 value2;
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int corr_ecc = 0;
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int uncorr_ecc = 0;
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#endif
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#endif
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/* Probing PCI using config cycles cause this exception
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/* Probing PCI using config cycles cause this exception
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@ -214,14 +216,22 @@ MachineCheckException(struct pt_regs *regs)
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printf("DDR0: At least one interrupt active\n");
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printf("DDR0: At least one interrupt active\n");
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if (val & 0x40)
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if (val & 0x40)
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printf("DDR0: DRAM initialization complete.\n");
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printf("DDR0: DRAM initialization complete.\n");
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if (val & 0x20)
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if (val & 0x20) {
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printf("DDR0: Multiple uncorrectable ECC events.\n");
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printf("DDR0: Multiple uncorrectable ECC events.\n");
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if (val & 0x10)
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uncorr_ecc = 1;
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}
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if (val & 0x10) {
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printf("DDR0: Single uncorrectable ECC event.\n");
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printf("DDR0: Single uncorrectable ECC event.\n");
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if (val & 0x08)
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uncorr_ecc = 1;
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}
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if (val & 0x08) {
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printf("DDR0: Multiple correctable ECC events.\n");
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printf("DDR0: Multiple correctable ECC events.\n");
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if (val & 0x04)
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corr_ecc = 1;
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}
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if (val & 0x04) {
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printf("DDR0: Single correctable ECC event.\n");
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printf("DDR0: Single correctable ECC event.\n");
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corr_ecc = 1;
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}
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if (val & 0x02)
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if (val & 0x02)
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printf("Multiple accesses outside the defined"
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printf("Multiple accesses outside the defined"
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" physical memory space detected\n");
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" physical memory space detected\n");
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@ -252,11 +262,11 @@ MachineCheckException(struct pt_regs *regs)
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printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2);
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printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2);
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}
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}
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mfsdram(DDR0_23, val);
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mfsdram(DDR0_23, val);
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if ( (val >> 16) & 0xff)
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if (((val >> 16) & 0xff) && corr_ecc)
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printf("DDR0: Syndrome for correctable ECC event 0x%x\n",
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printf("DDR0: Syndrome for correctable ECC event 0x%x\n",
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(val >> 16) & 0xff);
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(val >> 16) & 0xff);
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mfsdram(DDR0_23, val);
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mfsdram(DDR0_23, val);
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if ( (val >> 8) & 0xff)
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if (((val >> 8) & 0xff) && uncorr_ecc)
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printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n",
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printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n",
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(val >> 8) & 0xff);
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(val >> 8) & 0xff);
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mfsdram(DDR0_33, val);
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mfsdram(DDR0_33, val);
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@ -264,28 +274,28 @@ MachineCheckException(struct pt_regs *regs)
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printf("DDR0: Address of command that caused an "
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printf("DDR0: Address of command that caused an "
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"Out-of-Range interrupt %p\n", val);
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"Out-of-Range interrupt %p\n", val);
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mfsdram(DDR0_34, val);
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mfsdram(DDR0_34, val);
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if (val)
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if (val && uncorr_ecc)
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printf("DDR0: Address of uncorrectable ECC event %p\n", val);
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printf("DDR0: Address of uncorrectable ECC event %p\n", val);
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mfsdram(DDR0_35, val);
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mfsdram(DDR0_35, val);
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if (val)
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if (val && uncorr_ecc)
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printf("DDR0: Address of uncorrectable ECC event %p\n", val);
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printf("DDR0: Address of uncorrectable ECC event %p\n", val);
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mfsdram(DDR0_36, val);
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mfsdram(DDR0_36, val);
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if (val)
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if (val && uncorr_ecc)
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printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
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printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
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mfsdram(DDR0_37, val);
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mfsdram(DDR0_37, val);
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if (val)
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if (val && uncorr_ecc)
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printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
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printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
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mfsdram(DDR0_38, val);
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mfsdram(DDR0_38, val);
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if (val)
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if (val && corr_ecc)
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printf("DDR0: Address of correctable ECC event %p\n", val);
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printf("DDR0: Address of correctable ECC event %p\n", val);
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mfsdram(DDR0_39, val);
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mfsdram(DDR0_39, val);
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if (val)
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if (val && corr_ecc)
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printf("DDR0: Address of correctable ECC event %p\n", val);
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printf("DDR0: Address of correctable ECC event %p\n", val);
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mfsdram(DDR0_40, val);
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mfsdram(DDR0_40, val);
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if (val)
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if (val && corr_ecc)
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printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
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printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
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mfsdram(DDR0_41, val);
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mfsdram(DDR0_41, val);
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if (val)
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if (val && corr_ecc)
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printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
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printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
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#endif /* CONFIG_440EPX */
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#endif /* CONFIG_440EPX */
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#endif /* CONFIG_440 */
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#endif /* CONFIG_440 */
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