brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-09-27 23:20:26 +09:00
Code Issues Projects Releases Wiki Activity

serial: stm32x7: add clk_get_rate() support

Browse Source 
Replace proprietary clock_get() by clk_get_rate()
The stm32x7 serial driver is now "generic" and can be used
by other STM32 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
This commit is contained in:
Patrice Chotard 2017-07-18 09:29:08 +02:00 committed by Tom Rini
parent 122b2d4763
commit 27265cee76
2 changed files with 9 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/serial/serial_stm32x7.c
View File

@ -19,16 +19,9 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
{
struct stm32x7_serial_platdata *plat = dev->platdata;
struct stm32_usart *const usart = plat->base;
u32 clock, int_div, mantissa, fraction, oversampling;
u32 int_div, mantissa, fraction, oversampling;
if (((u32)usart & STM32_BUS_MASK) == APB1_PERIPH_BASE)
clock = clock_get(CLOCK_APB1);
else if (((u32)usart & STM32_BUS_MASK) == APB2_PERIPH_BASE)
clock = clock_get(CLOCK_APB2);
else
return -EINVAL;
int_div = DIV_ROUND_CLOSEST(clock, baudrate);
int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate);
if (int_div < 16) {
oversampling = 8;
@ -101,6 +94,12 @@ static int stm32_serial_probe(struct udevice *dev)
}
#endif
plat->clock_rate = clk_get_rate(&clk);
if (plat->clock_rate < 0) {
clk_disable(&clk);
return plat->clock_rate;
};
/* Disable usart-> disable overrun-> enable usart */
clrbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
setbits_le32(&usart->cr3, USART_CR3_OVRDIS);

2
drivers/serial/serial_stm32x7.h
View File

@ -25,7 +25,7 @@ struct stm32_usart {
/* Information about a serial port */
struct stm32x7_serial_platdata {
struct stm32_usart *base; /* address of registers in physical memory */
unsigned int clock;
unsigned long int clock_rate;
};
#define USART_CR1_OVER8 (1 << 15)