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rockchip: update boot0 hook
Rockchip SoCs only need boot0 hook at SPL, and the U-Boot proper do not need it. The very beginning of U-Boot proper is different between armv7 and armv8: armv7 start with ARM_VECTORS while armv8 start with 'b reset'. Here is the map of very beginning for all cases: armv7 SPL: TAG(overwrite 'b 1f')+'b reset' + ARM_VECTORS armv7 U-Boot: ARM_VECTORS armv8 SPL: TAG(overwrite 'b 1f')+'b reset' + Reserved_iram(rk3399) armv8 U-Boot: 'b reset' Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -39,7 +39,12 @@
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entry_counter:
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entry_counter:
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.word 0
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.word 0
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#endif
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#endif
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#if (defined(CONFIG_SPL_BUILD) || defined(CONFIG_ARM64))
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/* U-Boot proper of armv7 do not need this */
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b reset
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b reset
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#endif
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#if !defined(CONFIG_ARM64)
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#if !defined(CONFIG_ARM64)
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/*
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/*
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* For armv7, the addr '_start' will used as vector start address
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* For armv7, the addr '_start' will used as vector start address
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@ -50,6 +55,6 @@ _start:
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ARM_VECTORS
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ARM_VECTORS
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#endif
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#endif
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#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
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#if defined(CONFIG_SPL_BUILD) && (CONFIG_ROCKCHIP_SPL_RESERVE_IRAM > 0)
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.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
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.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
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#endif
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#endif
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