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arm: dts: add pwm support for MediaTek SoCs

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This patch add pwm support for mt7622, mt7623 and mt7629 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
This commit is contained in:
Sam Shih 2020-02-21 21:01:47 +08:00 committed by Tom Rini
parent a537fa4da1
commit 25a1b5efb3
3 changed files with 52 additions and 0 deletions
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19
arch/arm/dts/mt7622.dtsi
View File

@ -227,4 +227,23 @@
#clock-cells = <1>;
};
pwm: pwm@11006000 {
compatible = "mediatek,mt7622-pwm";
reg = <0x11006000 0x1000>;
#clock-cells = <1>;
#pwm-cells = <2>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_PWM_SEL>,
<&pericfg CLK_PERI_PWM_PD>,
<&pericfg CLK_PERI_PWM1_PD>,
<&pericfg CLK_PERI_PWM2_PD>,
<&pericfg CLK_PERI_PWM3_PD>,
<&pericfg CLK_PERI_PWM4_PD>,
<&pericfg CLK_PERI_PWM5_PD>,
<&pericfg CLK_PERI_PWM6_PD>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
"pwm5", "pwm6";
status = "disabled";
};
};

17
arch/arm/dts/mt7623.dtsi
View File

@ -400,4 +400,21 @@
mediatek,ethsys = <&ethsys>;
status = "disabled";
};
pwm: pwm@11006000 {
compatible = "mediatek,mt7623-pwm";
reg = <0x11006000 0x1000>;
#clock-cells = <1>;
#pwm-cells = <2>;
clocks = <&topckgen CLK_TOP_PWM_SEL>,
<&pericfg CLK_PERI_PWM>,
<&pericfg CLK_PERI_PWM1>,
<&pericfg CLK_PERI_PWM2>,
<&pericfg CLK_PERI_PWM3>,
<&pericfg CLK_PERI_PWM4>,
<&pericfg CLK_PERI_PWM5>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4",
"pwm5";
status = "disabled";
};
};

16
arch/arm/dts/mt7629.dtsi
View File

@ -281,4 +281,20 @@
reg = <0x1b130000 0x1000>;
#clock-cells = <1>;
};
pwm: pwm@11006000 {
compatible = "mediatek,mt7629-pwm";
reg = <0x11006000 0x1000>;
#clock-cells = <1>;
#pwm-cells = <2>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_LOW>;
clocks = <&topckgen CLK_TOP_PWM_SEL>,
<&pericfg CLK_PERI_PWM_PD>,
<&pericfg CLK_PERI_PWM1_PD>;
clock-names = "top", "main", "pwm1";
assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL2_D4>;
status = "disabled";
};
};