Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on layerscape products
2024-06-09 23:36:03 +09:00 · 2020-09-25 12:55:06 -04:00 · 2020-09-25 12:55:06 -04:00 · 253388acd6
commit 253388acd6
parent 1da91d9bcd 8ec619f8fd
55 changed files with 249 additions and 72 deletions
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017-2019 NXP
+ * Copyright 2017-2020 NXP
 * Copyright 2014-2015 Freescale Semiconductor, Inc.
 */

@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;

 void __efi_runtime reset_cpu(ulong addr)
 {
+#ifdef CONFIG_ARCH_LX2160A
+	/* clear the RST_REQ_MSK and SW_RST_REQ */
+	out_le32(rstcr, 0x0);
+
+	/* initiate the sw reset request */
+	out_le32(rstcr, 0x1);
+#else
 	u32 val;

-#ifdef CONFIG_ARCH_LX2160A
-	val = in_le32(rstcr);
-	val |= 0x01;
-	out_le32(rstcr, val);
-#else
 	/* Raise RESET_REQ_B */
 	val = scfg_in32(rstcr);
 	val |= 0x02;
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@ -36,6 +36,8 @@
 #ifdef CONFIG_TFABOOT
 #include <env_internal.h>
 #endif
+#include <dm.h>
+#include <linux/err.h>
 #if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
 DECLARE_GLOBAL_DATA_PTR;
 #endif
@ -43,7 +45,22 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_GIC_V3_ITS
 int ls_gic_rd_tables_init(void *blob)
 {
-	int ret;
+	struct fdt_memory lpi_base;
+	fdt_addr_t addr;
+	fdt_size_t size;
+	int offset, ret;
+
+	offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000");
+	addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg",
+						  0, &size, false);
+
+	lpi_base.start = addr;
+	lpi_base.end = addr + size - 1;
+	ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL);
+	if (ret) {
+		debug("%s: failed to add reserved memory\n", __func__);
+		return ret;
+	}

 	ret = gic_lpi_tables_init();
 	if (ret)
@ -897,6 +914,38 @@ __weak int fsl_board_late_init(void)
 	return 0;
 }

+#define DWC3_GSBUSCFG0			0xc100
+#define DWC3_GSBUSCFG0_CACHETYPE_SHIFT	16
+#define DWC3_GSBUSCFG0_CACHETYPE(n)        (((n) & 0xffff)            \
+	<< DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
+
+void enable_dwc3_snooping(void)
+{
+	int ret;
+	u32 val;
+	struct udevice *bus;
+	struct uclass *uc;
+	fdt_addr_t dwc3_base;
+
+	ret = uclass_get(UCLASS_USB, &uc);
+	if (ret)
+		return;
+
+	uclass_foreach_dev(bus, uc) {
+		if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
+			dwc3_base = devfdt_get_addr(bus);
+			if (dwc3_base == FDT_ADDR_T_NONE) {
+				dev_err(bus, "dwc3 regs missing\n");
+				continue;
+			}
+			val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
+			val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
+			val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);
+			writel(val, dwc3_base + DWC3_GSBUSCFG0);
+		}
+	}
+}
+
 int board_late_init(void)
 {
 #ifdef CONFIG_CHAIN_OF_TRUST
@ -934,6 +983,9 @@ int board_late_init(void)
 	fspi_ahb_init();
 #endif

+	if (IS_ENABLED(CONFIG_DM))
+		enable_dwc3_snooping();
+
 	return fsl_board_late_init();
 }
 #endif
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@ -44,6 +44,12 @@
 					 IRQ_TYPE_LEVEL_LOW)>;
 	};

+	gic_lpi_base: syscon@0x80000000 {
+		compatible = "gic-lpi-base";
+		reg = <0x0 0x80000000 0x0 0x100000>;
+		max-gic-redistributors = <2>;
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@ -26,6 +26,12 @@
 		interrupts = <1 9 0x4>;
 	};

+	gic_lpi_base: syscon@0x80000000 {
+		compatible = "gic-lpi-base";
+		reg = <0x0 0x80000000 0x0 0x100000>;
+		max-gic-redistributors = <8>;
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@ -26,6 +26,12 @@
 		interrupts = <1 9 0x4>;
 	};

+	gic_lpi_base: syscon@0x80000000 {
+		compatible = "gic-lpi-base";
+		reg = <0x0 0x80000000 0x0 0x100000>;
+		max-gic-redistributors = <8>;
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@ -43,6 +43,12 @@
 		interrupts = <1 9 0x4>;
 	};

+	gic_lpi_base: syscon@0x80000000 {
+		compatible = "gic-lpi-base";
+		reg = <0x0 0x80000000 0x0 0x200000>;
+		max-gic-redistributors = <16>;
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
@ -193,6 +199,28 @@
 		num-cs = <6>;
 	};

+	gpio0: gpio@2300000 {
+		compatible = "fsl,qoriq-gpio";
+		reg = <0x0 0x2300000 0x0 0x10000>;
+		interrupts = <0 36 4>;
+		gpio-controller;
+		little-endian;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	gpio1: gpio@2310000 {
+		compatible = "fsl,qoriq-gpio";
+		reg = <0x0 0x2310000 0x0 0x10000>;
+		interrupts = <0 36 4>;
+		gpio-controller;
+		little-endian;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
 	gpio2: gpio@2320000 {
 		compatible = "fsl,qoriq-gpio";
 		reg = <0x0 0x2320000 0x0 0x10000>;
@ -204,6 +232,17 @@
 		#interrupt-cells = <2>;
 	};

+	gpio3: gpio@2330000 {
+		compatible = "fsl,qoriq-gpio";
+		reg = <0x0 0x2330000 0x0 0x10000>;
+		interrupts = <0 37 4>;
+		gpio-controller;
+		little-endian;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
 	watchdog@23a0000 {
 		compatible = "arm,sbsa-gwdt";
 		reg = <0x0 0x23a0000 0 0x1000>,
@ -297,7 +336,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};

 	pcie@3500000 {
@ -312,7 +352,8 @@
 		device_type = "pci";
 		num-lanes = <2>;
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};

 	pcie@3600000 {
@ -326,7 +367,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x90 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};

 	pcie@3700000 {
@ -340,7 +382,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0x98 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};

 	pcie@3800000 {
@ -354,7 +397,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0xa0 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};

 	pcie@3900000 {
@ -368,7 +412,8 @@
 		#size-cells = <2>;
 		device_type = "pci";
 		bus-range = <0x0 0xff>;
-		ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
+		ranges = <0x81000000 0x0 0x00000000 0xa8 0x00020000 0x0 0x00010000   /* downstream I/O */
+			  0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 	};

 	fsl_mc: fsl-mc@80c000000 {
--- a/board/freescale/common/emc2305.c
+++ b/board/freescale/common/emc2305.c
@ -1,8 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2018 NXP.
+ * Copyright 2018-2020 NXP.
 *
- * SPDX-License-Identifier:     GPL-2.0+
 */

 #include <common.h>
@ -14,7 +13,7 @@

 DECLARE_GLOBAL_DATA_PTR;

-void set_fan_speed(u8 data)
+void set_fan_speed(u8 data, int chip_addr)
 {
 	u8 index;
 	u8 Fan[NUM_OF_FANS] = {I2C_EMC2305_FAN1,
@ -25,14 +24,14 @@ void set_fan_speed(u8 data)

 	for (index = 0; index < NUM_OF_FANS; index++) {
 #ifndef CONFIG_DM_I2C
-		if (i2c_write(I2C_EMC2305_ADDR, Fan[index], 1, &data, 1) != 0) {
+		if (i2c_write(chip_addr, Fan[index], 1, &data, 1) != 0) {
 			printf("Error: failed to change fan speed @%x\n",
 			       Fan[index]);
 		}
 #else
 		struct udevice *dev;

-		if (i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev))
+		if (i2c_get_chip_for_busnum(0, chip_addr, 1, &dev))
 			continue;

 		if (dm_i2c_write(dev, Fan[index], &data, 1) != 0) {
@ -43,18 +42,18 @@ void set_fan_speed(u8 data)
 	}
 }

-void emc2305_init(void)
+void emc2305_init(int chip_addr)
 {
 	u8 data;

 	data = I2C_EMC2305_CMD;
 #ifndef CONFIG_DM_I2C
-	if (i2c_write(I2C_EMC2305_ADDR, I2C_EMC2305_CONF, 1, &data, 1) != 0)
+	if (i2c_write(chip_addr, I2C_EMC2305_CONF, 1, &data, 1) != 0)
 		printf("Error: failed to configure EMC2305\n");
 #else
 	struct udevice *dev;

-	if (!i2c_get_chip_for_busnum(0, I2C_EMC2305_ADDR, 1, &dev))
+	if (!i2c_get_chip_for_busnum(0, chip_addr, 1, &dev))
 		if (dm_i2c_write(dev, I2C_EMC2305_CONF, &data, 1))
 			printf("Error: failed to configure EMC2305\n");
 #endif
--- a/board/freescale/common/emc2305.h
+++ b/board/freescale/common/emc2305.h
@ -1,8 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
 *
- * SPDX-License-Identifier:     GPL-2.0+
 */

 #ifndef __EMC2305_H_
@ -17,7 +16,7 @@

 #define NUM_OF_FANS			5

-void emc2305_init(void);
-void set_fan_speed(u8 data);
+void emc2305_init(int chip_addr);
+void set_fan_speed(u8 data, int chip_addr);

 #endif  /* __EMC2305_H_ */
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@ -533,14 +533,14 @@ int adjust_vdd(ulong vdd_override)
 		0,      /* reserved */
 		0,      /* reserved */
 		0,      /* reserved */
-		0,      /* reserved */
-		0,      /* reserved */
-		0,      /* reserved */
 		9000,      /* reserved */
 		0,      /* reserved */
 		0,      /* reserved */
 		0,      /* reserved */
 		0,      /* reserved */
+		0,      /* reserved */
+		0,      /* reserved */
+		0,      /* reserved */
 		10000,  /* 1.0000V */
 		0,      /* reserved */
 		10250,
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@ -114,8 +114,8 @@ int board_early_init_f(void)

 #ifdef CONFIG_EMC2305
 	select_i2c_ch_pca9547(I2C_MUX_CH_EMC2305);
-	emc2305_init();
-	set_fan_speed(I2C_EMC2305_PWM);
+	emc2305_init(I2C_EMC2305_ADDR);
+	set_fan_speed(I2C_EMC2305_PWM, I2C_EMC2305_ADDR);
 	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 #endif

--- a/configs/ls1012a2g5rdb_qspi_defconfig
+++ b/configs/ls1012a2g5rdb_qspi_defconfig
@ -34,6 +34,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
--- a/configs/ls1012a2g5rdb_tfa_defconfig
+++ b/configs/ls1012a2g5rdb_tfa_defconfig
@ -34,6 +34,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@ -32,6 +32,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
--- a/configs/ls1012afrdm_tfa_defconfig
+++ b/configs/ls1012afrdm_tfa_defconfig
@ -32,6 +32,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
--- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
@ -32,6 +32,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
--- a/configs/ls1012afrwy_qspi_defconfig
+++ b/configs/ls1012afrwy_qspi_defconfig
@ -34,6 +34,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x401D0000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
--- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
@ -32,6 +32,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
--- a/configs/ls1012afrwy_tfa_defconfig
+++ b/configs/ls1012afrwy_tfa_defconfig
@ -34,6 +34,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@ -40,6 +40,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_USE_ENV_SPI_BUS=y
 CONFIG_ENV_SPI_BUS=0
--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
@ -37,6 +37,7 @@ CONFIG_DEFAULT_SPI_BUS=1
 CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
--- a/configs/ls1012aqds_tfa_defconfig
+++ b/configs/ls1012aqds_tfa_defconfig
@ -40,6 +40,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_USE_ENV_SPI_BUS=y
 CONFIG_ENV_SPI_BUS=0
--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@ -35,6 +35,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@ -35,6 +35,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40300000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
--- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
@ -34,6 +34,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
--- a/configs/ls1012ardb_tfa_defconfig
+++ b/configs/ls1012ardb_tfa_defconfig
@ -35,6 +35,7 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
--- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
--- a/configs/ls1046afrwy_tfa_defconfig
+++ b/configs/ls1046afrwy_tfa_defconfig
@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40500000
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@ -33,6 +33,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_I2C=y
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@ -33,6 +33,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@ -34,6 +34,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@ -42,6 +42,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@ -33,6 +33,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40300000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@ -51,6 +51,7 @@ CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@ -49,6 +49,7 @@ CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)"
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@ -35,6 +35,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_I2C=y
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@ -36,6 +36,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:4m(nand_uboot),36m(nand_kernel),472m(nand_free);spi0.0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_NAND=y
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@ -45,6 +45,7 @@ CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@ -28,6 +28,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40300000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
--- a/configs/ls1046ardb_qspi_spl_defconfig
+++ b/configs/ls1046ardb_qspi_spl_defconfig
@ -48,6 +48,7 @@ CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SPL_ENV_IS_NOWHERE=y
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@ -44,6 +44,7 @@ CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@ -44,6 +44,7 @@ CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
--- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
@ -29,6 +29,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_DM_I2C=y
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@ -30,6 +30,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40500000
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@ -98,6 +98,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
 		if_mode &= ~IF_MODE_MASK;
 		if_mode |= (IF_MODE_GMII);
 		break;
+	case PHY_INTERFACE_MODE_XFI:
 	case PHY_INTERFACE_MODE_XGMII:
 		if_mode &= ~IF_MODE_MASK;
 		if_mode |= IF_MODE_XGMII;
@ -106,7 +107,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
 		break;
 	}
 	/* Enable automatic speed selection for Non-XGMII */
-	if (type != PHY_INTERFACE_MODE_XGMII)
+	if (type != PHY_INTERFACE_MODE_XGMII && type != PHY_INTERFACE_MODE_XFI)
 		if_mode |= IF_MODE_EN_AUTO;

 	if (type == PHY_INTERFACE_MODE_RGMII ||
--- a/drivers/net/ldpaa_eth/lx2160a.c
+++ b/drivers/net/ldpaa_eth/lx2160a.c
@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2018 NXP
+ * Copyright 2018, 2020 NXP
 */
 #include <common.h>
 #include <phy.h>
@ -57,7 +57,7 @@ phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtcl)
 {
 	enum srds_prtcl;

-	if (is_device_disabled(dpmac_id + 1))
+	if (is_device_disabled(dpmac_id))
 		return PHY_INTERFACE_MODE_NONE;

 	if (lane_prtcl >= SGMII1 && lane_prtcl <= SGMII18)
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@ -176,9 +176,10 @@ static int pfe_eth_send(struct udevice *dev, void *packet, int length)

 		udelay(100);
 		i++;
-		if (i == 30000)
+		if (i == 30000) {
 			printf("Tx timeout, send failed\n");
-		break;
+			break;
+		}
 	}

 	return 0;
@ -213,27 +214,22 @@ static int pfe_eth_recv(struct udevice *dev, int flags, uchar **packetp)
 static int pfe_eth_probe(struct udevice *dev)
 {
 	struct pfe_eth_dev *priv = dev_get_priv(dev);
-	struct pfe_ddr_address *pfe_addr;
+	struct pfe_ddr_address pfe_addr;
 	struct pfe_eth_pdata *pdata = dev_get_platdata(dev);
 	int ret = 0;
 	static int init_done;

 	if (!init_done) {
-		pfe_addr = (struct pfe_ddr_address *)malloc(sizeof
-						    (struct pfe_ddr_address));
-		if (!pfe_addr)
-			return -ENOMEM;
-
-		pfe_addr->ddr_pfe_baseaddr =
+		pfe_addr.ddr_pfe_baseaddr =
 				(void *)pdata->pfe_ddr_addr.ddr_pfe_baseaddr;
-		pfe_addr->ddr_pfe_phys_baseaddr =
+		pfe_addr.ddr_pfe_phys_baseaddr =
 		(unsigned long)pdata->pfe_ddr_addr.ddr_pfe_phys_baseaddr;

 		debug("ddr_pfe_baseaddr: %p, ddr_pfe_phys_baseaddr: %08x\n",
-		      pfe_addr->ddr_pfe_baseaddr,
-		      (u32)pfe_addr->ddr_pfe_phys_baseaddr);
+		      pfe_addr.ddr_pfe_baseaddr,
+		      (u32)pfe_addr.ddr_pfe_phys_baseaddr);

-		ret = pfe_drv_init(pfe_addr);
+		ret = pfe_drv_init(&pfe_addr);
 		if (ret)
 			return ret;

--- a/drivers/net/pfe_eth/pfe_firmware.c
+++ b/drivers/net/pfe_eth/pfe_firmware.c
@ -167,25 +167,23 @@ static int pfe_fit_check(void)
 int pfe_spi_flash_init(void)
 {
 	struct spi_flash *pfe_flash;
+	struct udevice *new;
 	int ret = 0;
 	void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);

-#ifdef CONFIG_DM_SPI_FLASH
-	struct udevice *new;
+	if (!addr)
+		return -ENOMEM;

-	/* speed and mode will be read from DT */
 	ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS,
-				     CONFIG_ENV_SPI_CS, 0, 0, &new);
+				     CONFIG_ENV_SPI_CS,
+				     CONFIG_ENV_SPI_MAX_HZ,
+				     CONFIG_ENV_SPI_MODE,
+				     &new);

 	pfe_flash = dev_get_uclass_priv(new);
-#else
-	pfe_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
-				    CONFIG_ENV_SPI_CS,
-				    CONFIG_ENV_SPI_MAX_HZ,
-				    CONFIG_ENV_SPI_MODE);
-#endif
 	if (!pfe_flash) {
 		printf("SF: probe for pfe failed\n");
+		free(addr);
 		return -ENODEV;
 	}

--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@ -680,6 +680,20 @@ struct phy_driver aqr112_driver = {
 	.data = AQUANTIA_GEN3,
 };

+struct phy_driver aqr113c_driver = {
+	.name = "Aquantia AQR113C",
+	.uid = 0x31c31c12,
+	.mask = 0xfffffff0,
+	.features = PHY_10G_FEATURES,
+	.mmds = (MDIO_MMD_PMAPMD | MDIO_MMD_PCS |
+		 MDIO_MMD_PHYXS | MDIO_MMD_AN |
+		 MDIO_MMD_VEND1),
+	.config = &aquantia_config,
+	.startup = &aquantia_startup,
+	.shutdown = &gen10g_shutdown,
+	.data = AQUANTIA_GEN3,
+};
+
 struct phy_driver aqr405_driver = {
 	.name = "Aquantia AQR405",
 	.uid = 0x3a1b4b2,
@ -716,6 +730,7 @@ int phy_aquantia_init(void)
 	phy_register(&aqr106_driver);
 	phy_register(&aqr107_driver);
 	phy_register(&aqr112_driver);
+	phy_register(&aqr113c_driver);
 	phy_register(&aqr405_driver);
 	phy_register(&aqr412_driver);

--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@ -188,6 +188,12 @@ static void fdt_fixup_pcie_ls(void *blob)
 	     pci_find_next_device(&dev)) {
 		for (bus = dev; device_is_on_pci_bus(bus);)
 			bus = bus->parent;
+
+		/* Only do the fixups for layerscape PCIe controllers */
+		if (!device_is_compatible(bus, "fsl,ls-pcie") &&
+		    !device_is_compatible(bus, CONFIG_FSL_PCIE_COMPAT))
+			continue;
+
 		pcie_rc = dev_get_priv(bus);

 		streamid = pcie_next_streamid(pcie_rc->stream_id_cur,
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@ -41,6 +41,8 @@ int lx2_board_fix_fdt(void *fdt)
 		{ "config_axi_slave", "config" }
 	};
 	int off = -1, i;
+	const fdt32_t *prop;
+	u32 ob_wins, ib_wins;

 	off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
 	while (off != -FDT_ERR_NOTFOUND) {
@ -86,6 +88,30 @@ int lx2_board_fix_fdt(void *fdt)
 		off = fdt_node_offset_by_compatible(fdt, off,
 						    "fsl,lx2160a-pcie");
 	}
+
+	/* Fixup PCIe EP nodes */
+	off = -1;
+	off = fdt_node_offset_by_compatible(fdt, off, "fsl,lx2160a-pcie-ep");
+	while (off != -FDT_ERR_NOTFOUND) {
+		fdt_setprop_string(fdt, off, "compatible",
+				   "fsl,lx2160ar2-pcie-ep");
+		prop = fdt_getprop(fdt, off, "apio-wins", NULL);
+		if (!prop) {
+			printf("%s: Failed to fixup PCIe EP node @0x%x\n",
+			       __func__, off);
+			continue;
+		}
+
+		ob_wins = fdt32_to_cpu(*prop);
+		ib_wins = (ob_wins == 256) ? 24 : 8;
+		fdt_setprop_u32(fdt, off, "num-ib-windows", ib_wins);
+		fdt_setprop_u32(fdt, off, "num-ob-windows", ob_wins);
+		fdt_delprop(fdt, off, "apio-wins");
+
+		off = fdt_node_offset_by_compatible(fdt, off,
+						    "fsl,lx2160a-pcie-ep");
+	}
+
 	return 0;
 }

--- a/include/configs/ls1028aqds.h
+++ b/include/configs/ls1028aqds.h
@ -129,13 +129,6 @@
 			"run scan_dev_for_boot; " \
 		  "fi; " \
 		"done\0" \
-	"scan_dev_for_boot=" \
-		"echo Scanning ${devtype} " \
-				"${devnum}:${distro_bootpart}...; " \
-		"for prefix in ${boot_prefixes}; do " \
-			"run scan_dev_for_scripts; " \
-		"done;" \
-		"\0" \
 	"boot_a_script=" \
 		"load ${devtype} ${devnum}:${distro_bootpart} " \
 			"${scriptaddr} ${prefix}${script}; " \
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@ -112,13 +112,6 @@
 			"run scan_dev_for_boot; "            \
 		  "fi; "                                   \
 		"done\0"                                   \
-	"scan_dev_for_boot="				  \
-		"echo Scanning ${devtype} "		  \
-				"${devnum}:${distro_bootpart}...; "  \
-		"for prefix in ${boot_prefixes}; do "	  \
-			"run scan_dev_for_scripts; "	  \
-		"done;"					  \
-		"\0"					  \
 	"boot_a_script="				  \
 		"load ${devtype} ${devnum}:${distro_bootpart} "  \
 			"${scriptaddr} ${prefix}${script}; "    \
--- a/include/configs/lx2160aqds.h
+++ b/include/configs/lx2160aqds.h
@ -131,7 +131,7 @@ u8 qixis_esdhc_detect_quirk(void);
 		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
 		" bootm $load_addr#$BOARD\0"			\
 	"sd_bootcmd=echo Trying load from sd card..;"		\
-		"mmcinfo; mmc read $load_addr "			\
+		"mmc dev 0; mmcinfo; mmc read $load_addr "			\
 		"$kernel_addr_sd $kernel_size_sd ;"		\
 		"env exists secureboot && mmc read $kernelheader_addr_r "\
 		"$kernelhdr_addr_sd $kernelhdr_size_sd "	\
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@ -101,7 +101,7 @@
 		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
 		" bootm $load_addr#$BOARD\0"			\
 	"sd_bootcmd=echo Trying load from sd card..;"		\
-		"mmcinfo; mmc read $load_addr "			\
+		"mmc dev 0; mmcinfo; mmc read $load_addr "			\
 		"$kernel_addr_sd $kernel_size_sd ;"		\
 		"env exists secureboot && mmc read $kernelheader_addr_r "\
 		"$kernelhdr_addr_sd $kernelhdr_size_sd "	\