board: Add stm32h7 SoC, discovery and evaluation boards support

This patch adds support for stm32h7 soc family, stm32h743
discovery and evaluation boards.

For more information about STM32H7 series, please visit:
http://www.st.com/en/microcontrollers/stm32h7-series.html

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Patrice Chotard 2017-09-13 18:00:12 +02:00 committed by Tom Rini
parent a1e384b4d9
commit 246771b184
19 changed files with 585 additions and 0 deletions

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@ -0,0 +1,126 @@
/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _STM32_GPIO_H_
#define _STM32_GPIO_H_
#include <asm/gpio.h>
enum stm32_gpio_port {
STM32_GPIO_PORT_A = 0,
STM32_GPIO_PORT_B,
STM32_GPIO_PORT_C,
STM32_GPIO_PORT_D,
STM32_GPIO_PORT_E,
STM32_GPIO_PORT_F,
STM32_GPIO_PORT_G,
STM32_GPIO_PORT_H,
STM32_GPIO_PORT_I
};
enum stm32_gpio_pin {
STM32_GPIO_PIN_0 = 0,
STM32_GPIO_PIN_1,
STM32_GPIO_PIN_2,
STM32_GPIO_PIN_3,
STM32_GPIO_PIN_4,
STM32_GPIO_PIN_5,
STM32_GPIO_PIN_6,
STM32_GPIO_PIN_7,
STM32_GPIO_PIN_8,
STM32_GPIO_PIN_9,
STM32_GPIO_PIN_10,
STM32_GPIO_PIN_11,
STM32_GPIO_PIN_12,
STM32_GPIO_PIN_13,
STM32_GPIO_PIN_14,
STM32_GPIO_PIN_15
};
enum stm32_gpio_mode {
STM32_GPIO_MODE_IN = 0,
STM32_GPIO_MODE_OUT,
STM32_GPIO_MODE_AF,
STM32_GPIO_MODE_AN
};
enum stm32_gpio_otype {
STM32_GPIO_OTYPE_PP = 0,
STM32_GPIO_OTYPE_OD
};
enum stm32_gpio_speed {
STM32_GPIO_SPEED_2M = 0,
STM32_GPIO_SPEED_25M,
STM32_GPIO_SPEED_50M,
STM32_GPIO_SPEED_100M
};
enum stm32_gpio_pupd {
STM32_GPIO_PUPD_NO = 0,
STM32_GPIO_PUPD_UP,
STM32_GPIO_PUPD_DOWN
};
enum stm32_gpio_af {
STM32_GPIO_AF0 = 0,
STM32_GPIO_AF1,
STM32_GPIO_AF2,
STM32_GPIO_AF3,
STM32_GPIO_AF4,
STM32_GPIO_AF5,
STM32_GPIO_AF6,
STM32_GPIO_AF7,
STM32_GPIO_AF8,
STM32_GPIO_AF9,
STM32_GPIO_AF10,
STM32_GPIO_AF11,
STM32_GPIO_AF12,
STM32_GPIO_AF13,
STM32_GPIO_AF14,
STM32_GPIO_AF15
};
struct stm32_gpio_dsc {
enum stm32_gpio_port port;
enum stm32_gpio_pin pin;
};
struct stm32_gpio_ctl {
enum stm32_gpio_mode mode;
enum stm32_gpio_otype otype;
enum stm32_gpio_speed speed;
enum stm32_gpio_pupd pupd;
enum stm32_gpio_af af;
};
struct stm32_gpio_regs {
u32 moder; /* GPIO port mode */
u32 otyper; /* GPIO port output type */
u32 ospeedr; /* GPIO port output speed */
u32 pupdr; /* GPIO port pull-up/pull-down */
u32 idr; /* GPIO port input data */
u32 odr; /* GPIO port output data */
u32 bsrr; /* GPIO port bit set/reset */
u32 lckr; /* GPIO port configuration lock */
u32 afr[2]; /* GPIO alternate function */
};
struct stm32_gpio_priv {
struct stm32_gpio_regs *regs;
};
static inline unsigned stm32_gpio_to_port(unsigned gpio)
{
return gpio / 16;
}
static inline unsigned stm32_gpio_to_pin(unsigned gpio)
{
return gpio % 16;
}
#endif /* _STM32_GPIO_H_ */

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/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARCH_HARDWARE_H
#define _ASM_ARCH_HARDWARE_H
/*
* This empty files is needed to not break compilation
* Some common drivers to STM32F4/F7 and H7 include a stm32.h file
* Some cleanup need to be done to communalize all the following
* stm32.h files:
*
* arch/arm/include/asm/arch-stm32f1/stm32.h
* arch/arm/include/asm/arch-stm32f4/stm32.h
* arch/arm/include/asm/arch-stm32f7/stm32.h
*/
#endif /* _ASM_ARCH_HARDWARE_H */

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@ -25,7 +25,24 @@ config STM32F7
select SPL_SYS_MALLOC_SIMPLE
select SPL_XIP_SUPPORT
config STM32H7
bool "stm32h7 family"
select CLK
select DM_GPIO
select DM_RESET
select MISC
select PINCTRL
select PINCTRL_STM32
select RAM
select REGMAP
select STM32_SDRAM
select STM32_RCC
select STM32_RESET
select STM32X7_SERIAL
select SYSCON
source "arch/arm/mach-stm32/stm32f4/Kconfig"
source "arch/arm/mach-stm32/stm32f7/Kconfig"
source "arch/arm/mach-stm32/stm32h7/Kconfig"
endif

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@ -7,3 +7,4 @@
obj-$(CONFIG_STM32F4) += stm32f4/
obj-$(CONFIG_STM32F7) += stm32f7/
obj-$(CONFIG_STM32H7) += stm32h7/

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if STM32H7
config TARGET_STM32H743_DISCO
bool "STM32H743 Discovery board"
config TARGET_STM32H743_EVAL
bool "STM32H743 Evaluation board"
source "board/st/stm32h743-eval/Kconfig"
source "board/st/stm32h743-disco/Kconfig"
endif

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#
# Copyright (c) 2017
# Patrice Chotard <patrice.chotard@st.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += soc.o

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/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/armv7m_mpu.h>
u32 get_cpu_rev(void)
{
return 0;
}
int arch_cpu_init(void)
{
int i;
struct mpu_region_config stm32_region_config[] = {
/*
* Make all 4GB cacheable & executable. We are overriding it
* with next region for any requirement. e.g. below region1,
* 2 etc.
* In other words, the area not coming in following
* regions configuration is the one configured here in region_0
* (cacheable & executable).
*/
{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
O_I_WB_RD_WR_ALLOC, REGION_4GB },
/* Code area, executable & strongly ordered */
{ 0xD0000000, REGION_1, XN_EN, PRIV_RW_USR_RW,
STRONG_ORDER, REGION_8MB },
/* Device area in all H7 : Not executable */
{ 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,
DEVICE_NON_SHARED, REGION_512MB },
/*
* Armv7m fixed configuration: strongly ordered & not
* executable, not cacheable
*/
{ 0xE0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,
STRONG_ORDER, REGION_512MB },
};
disable_mpu();
for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
mpu_config(&stm32_region_config[i]);
enable_mpu();
return 0;
}
void s_init(void)
{
}

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@ -0,0 +1,19 @@
if TARGET_STM32H743_DISCO
config SYS_BOARD
string
default "stm32h743-disco"
config SYS_VENDOR
string
default "st"
config SYS_SOC
string
default "stm32h7"
config SYS_CONFIG_NAME
string
default "stm32h743-disco"
endif

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STM32H743 DISCOVERY BOARD
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: board/st/stm32h743-disco
F: include/configs/stm32h743-disco.h
F: configs/stm32h743-disco_defconfig
F: arch/arm/dts/stm32h7*

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@ -0,0 +1,8 @@
#
# Copyright (C) STMicroelectronics SA 2017
# Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.#
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := stm32h743-disco.o

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/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
struct udevice *dev;
int ret;
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
debug("DRAM init failed: %d\n", ret);
return ret;
}
if (fdtdec_setup_memory_size() != 0)
ret = -EINVAL;
return ret;
}
int dram_init_banksize(void)
{
fdtdec_setup_memory_banksize();
return 0;
}
int board_early_init_f(void)
{
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0;
}

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if TARGET_STM32H743_EVAL
config SYS_BOARD
string
default "stm32h743-eval"
config SYS_VENDOR
string
default "st"
config SYS_SOC
string
default "stm32h7"
config SYS_CONFIG_NAME
string
default "stm32h743-eval"
endif

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@ -0,0 +1,6 @@
STM32H743 EVALUATION BOARD
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: board/st/stm32h743-eval
F: include/configs/stm32h743-eval.h
F: configs/stm32h743-eval_defconfig

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@ -0,0 +1,8 @@
#
# (C) Copyright 2017
# Patrice Chotard, <patrice.chotard@st.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := stm32h743-eval.o

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@ -0,0 +1,56 @@
/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
struct udevice *dev;
int ret;
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret) {
debug("DRAM init failed: %d\n", ret);
return ret;
}
if (fdtdec_setup_memory_size() != 0)
ret = -EINVAL;
return ret;
}
int dram_init_banksize(void)
{
fdtdec_setup_memory_banksize();
return 0;
}
int board_early_init_f(void)
{
return 0;
}
u32 get_board_rev(void)
{
return 0;
}
int board_late_init(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0;
}

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CONFIG_ARM=y
CONFIG_STM32=y
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H743_DISCO=y
CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIMER=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
# CONFIG_PINCTRL_FULL is not set
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_REGEX=y
CONFIG_LIB_RAND=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set

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@ -0,0 +1,30 @@
CONFIG_ARM=y
CONFIG_STM32=y
CONFIG_SYS_MALLOC_F_LEN=0xF00
CONFIG_STM32H7=y
CONFIG_TARGET_STM32H743_EVAL=y
CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval"
CONFIG_BOOTDELAY=3
CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FPGA is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
CONFIG_CMD_TIMER=y
CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y
# CONFIG_PINCTRL_FULL is not set
# CONFIG_SPL_SERIAL_PRESENT is not set
CONFIG_REGEX=y
CONFIG_LIB_RAND=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER is not set

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@ -0,0 +1,51 @@
/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <config.h>
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR 0x30020000
#define CONFIG_SYS_TEXT_BASE 0x08000000
/*
* Configuration of the external SDRAM memory
*/
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_RAM_BASE 0xD0000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
#define CONFIG_SYS_LOAD_ADDR 0xD0400000
#define CONFIG_LOADADDR 0xD0400000
#define CONFIG_ENV_SIZE (8 << 10)
#define CONFIG_SYS_ARCH_TIMER
#define CONFIG_SYS_HZ_CLOCK 250000000
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define CONFIG_BOOTARGS \
"console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
/*
* Command line configuration.
*/
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
#endif /* __CONFIG_H */

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@ -0,0 +1,51 @@
/*
* Copyright (C) STMicroelectronics SA 2017
* Author(s): Patrice CHOTARD, <patrice.chotard@st.com> for STMicroelectronics.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <config.h>
#define CONFIG_SYS_FLASH_BASE 0x08000000
#define CONFIG_SYS_INIT_SP_ADDR 0x30020000
#define CONFIG_SYS_TEXT_BASE 0x08000000
/*
* Configuration of the external SDRAM memory
*/
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_RAM_BASE 0xD0000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE
#define CONFIG_SYS_LOAD_ADDR 0xD0400000
#define CONFIG_LOADADDR 0xD0400000
#define CONFIG_ENV_SIZE (8 << 10)
#define CONFIG_SYS_ARCH_TIMER
#define CONFIG_SYS_HZ_CLOCK 250000000
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
#define CONFIG_BOOTARGS \
"console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
/*
* Command line configuration.
*/
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_CMD_CACHE
#define CONFIG_BOARD_LATE_INIT
#endif /* __CONFIG_H */