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rockchip: clk: rk3399: allow requests for all UART clocks

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This patch adds the rate for UART1 and UART3 the same way
as already implemented for UART0 and UART2.

This is required for boards, which have their console output
on these UARTs.

Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Christoph Muellner 2019-05-07 10:58:44 +02:00 committed by Kever Yang
parent 78a1ac33cb
commit 2461543632
1 changed files with 2 additions and 0 deletions
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2
drivers/clk/rockchip/clk_rk3399.c
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@ -912,7 +912,9 @@ static ulong rk3399_clk_get_rate(struct clk *clk)
rate = rk3399_spi_get_clk(priv->cru, clk->id);
break;
case SCLK_UART0:
case SCLK_UART1:
case SCLK_UART2:
case SCLK_UART3:
return 24000000;
break;
case PCLK_HDMI_CTRL: