drivers: nand: brcmnand: add initial support

The driver brcmnand come from linux kernel 4.18.
Only SoC bcm6838 and bcm6858 are supported.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>

drivers/mtd/nand/raw/Kconfig

@@ -60,6 +60,31 @@ config SPL_GENERATE_ATMEL_PMECC_HEADER
 
 endif
 
+config NAND_BRCMNAND
+	bool "Support Broadcom NAND controller"
+	depends on OF_CONTROL && DM && MTD
+	help
+	  Enable the driver for NAND flash on platforms using a Broadcom NAND
+	  controller.
+
+config NAND_BRCMNAND_6838
+       bool "Support Broadcom NAND controller on bcm6838"
+       depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
+       help
+         Enable support for broadcom nand driver on bcm6838.
+
+config NAND_BRCMNAND_6858
+       bool "Support Broadcom NAND controller on bcm6858"
+       depends on NAND_BRCMNAND && ARCH_BCM6858
+       help
+         Enable support for broadcom nand driver on bcm6858.
+
+config NAND_BRCMNAND_63158
+       bool "Support Broadcom NAND controller on bcm63158"
+       depends on NAND_BRCMNAND && ARCH_BCM63158
+       help
+         Enable support for broadcom nand driver on bcm63158.
+
 config NAND_DAVINCI
 	bool "Support TI Davinci NAND controller"
 	help

drivers/mtd/nand/raw/Makefile

@@ -41,6 +41,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o
 
 obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o
 obj-$(CONFIG_NAND_ARASAN) += arasan_nfc.o
+obj-$(CONFIG_NAND_BRCMNAND) += brcmnand/
 obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
 obj-$(CONFIG_NAND_DENALI) += denali.o
 obj-$(CONFIG_NAND_DENALI_DT) += denali_dt.o

drivers/mtd/nand/raw/brcmnand/Makefile

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o
+obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o
+obj-$(CONFIG_NAND_BRCMNAND) += brcmnand.o
+obj-$(CONFIG_NAND_BRCMNAND) += brcmnand_compat.o

drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c

@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm63158_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM63158_NAND_INT		0x00
+#define BCM63158_NAND_STATUS_SHIFT	0
+#define BCM63158_NAND_STATUS_MASK	(0xfff << BCM63158_NAND_STATUS_SHIFT)
+
+#define BCM63158_NAND_INT_EN		0x04
+#define BCM63158_NAND_ENABLE_SHIFT	0
+#define BCM63158_NAND_ENABLE_MASK	(0xffff << BCM63158_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM63158_NP_READ		= BIT(0),
+	BCM63158_BLOCK_ERASE	= BIT(1),
+	BCM63158_COPY_BACK	= BIT(2),
+	BCM63158_PAGE_PGM	= BIT(3),
+	BCM63158_CTRL_READY	= BIT(4),
+	BCM63158_DEV_RBPIN	= BIT(5),
+	BCM63158_ECC_ERR_UNC	= BIT(6),
+	BCM63158_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63158_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63158_nand_soc *priv =
+			container_of(soc, struct bcm63158_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63158_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63158_CTRL_READY << BCM63158_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63158_NAND_STATUS_MASK;
+		val |= BCM63158_CTRL_READY << BCM63158_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63158_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63158_nand_soc *priv =
+			container_of(soc, struct bcm63158_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63158_NAND_INT_EN;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63158_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63158_CTRL_READY << BCM63158_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63158_CTRL_READY << BCM63158_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63158_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm63158_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm63158_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63158_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63158_NAND_INT_EN);
+	brcmnand_writel(0, priv->base + BCM63158_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm63158_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm63158",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm63158_nand) = {
+	.name = "bcm63158-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm63158_nand_dt_ids,
+	.probe = bcm63158_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm63158_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm63158_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}

drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c

@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm6838_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM6838_NAND_INT		0x00
+#define  BCM6838_NAND_STATUS_SHIFT	0
+#define  BCM6838_NAND_STATUS_MASK	(0xfff << BCM6838_NAND_STATUS_SHIFT)
+#define  BCM6838_NAND_ENABLE_SHIFT	16
+#define  BCM6838_NAND_ENABLE_MASK	(0xffff << BCM6838_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM6838_NP_READ		= BIT(0),
+	BCM6838_BLOCK_ERASE	= BIT(1),
+	BCM6838_COPY_BACK	= BIT(2),
+	BCM6838_PAGE_PGM	= BIT(3),
+	BCM6838_CTRL_READY	= BIT(4),
+	BCM6838_DEV_RBPIN	= BIT(5),
+	BCM6838_ECC_ERR_UNC	= BIT(6),
+	BCM6838_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm6838_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm6838_nand_soc *priv =
+			container_of(soc, struct bcm6838_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6838_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM6838_NAND_STATUS_MASK;
+		val |= BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm6838_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm6838_nand_soc *priv =
+			container_of(soc, struct bcm6838_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6838_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM6838_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm6838_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm6838_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = ioremap(res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm6838_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm6838_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM6838_NAND_INT);
+	brcmnand_writel(BCM6838_NAND_STATUS_MASK,
+			priv->base + BCM6838_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm6838_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm6838",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm6838_nand) = {
+	.name = "bcm6838-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm6838_nand_dt_ids,
+	.probe = bcm6838_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm6838_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm6838_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}

drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c

@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <asm/io.h>
+#include <memalign.h>
+#include <nand.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <dm.h>
+
+#include "brcmnand.h"
+
+struct bcm6858_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+};
+
+#define BCM6858_NAND_INT		0x00
+#define BCM6858_NAND_STATUS_SHIFT	0
+#define BCM6858_NAND_STATUS_MASK	(0xfff << BCM6858_NAND_STATUS_SHIFT)
+
+#define BCM6858_NAND_INT_EN		0x04
+#define BCM6858_NAND_ENABLE_SHIFT	0
+#define BCM6858_NAND_ENABLE_MASK	(0xffff << BCM6858_NAND_ENABLE_SHIFT)
+
+enum {
+	BCM6858_NP_READ		= BIT(0),
+	BCM6858_BLOCK_ERASE	= BIT(1),
+	BCM6858_COPY_BACK	= BIT(2),
+	BCM6858_PAGE_PGM	= BIT(3),
+	BCM6858_CTRL_READY	= BIT(4),
+	BCM6858_DEV_RBPIN	= BIT(5),
+	BCM6858_ECC_ERR_UNC	= BIT(6),
+	BCM6858_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm6858_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm6858_nand_soc *priv =
+			container_of(soc, struct bcm6858_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6858_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM6858_CTRL_READY << BCM6858_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM6858_NAND_STATUS_MASK;
+		val |= BCM6858_CTRL_READY << BCM6858_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm6858_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm6858_nand_soc *priv =
+			container_of(soc, struct bcm6858_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM6858_NAND_INT_EN;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM6858_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM6858_CTRL_READY << BCM6858_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM6858_CTRL_READY << BCM6858_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm6858_nand_probe(struct udevice *dev)
+{
+	struct udevice *pdev = dev;
+	struct bcm6858_nand_soc *priv = dev_get_priv(dev);
+	struct brcmnand_soc *soc;
+	struct resource res;
+
+	soc = &priv->soc;
+
+	dev_read_resource_byname(pdev, "nand-int-base", &res);
+	priv->base = devm_ioremap(dev, res.start, resource_size(&res));
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	soc->ctlrdy_ack = bcm6858_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm6858_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM6858_NAND_INT_EN);
+	brcmnand_writel(0, priv->base + BCM6858_NAND_INT);
+
+	return brcmnand_probe(pdev, soc);
+}
+
+static const struct udevice_id bcm6858_nand_dt_ids[] = {
+	{
+		.compatible = "brcm,nand-bcm6858",
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(bcm6858_nand) = {
+	.name = "bcm6858-nand",
+	.id = UCLASS_MTD,
+	.of_match = bcm6858_nand_dt_ids,
+	.probe = bcm6858_nand_probe,
+	.priv_auto_alloc_size = sizeof(struct bcm6858_nand_soc),
+};
+
+void board_nand_init(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MTD,
+					  DM_GET_DRIVER(bcm6858_nand), &dev);
+	if (ret && ret != -ENODEV)
+		pr_err("Failed to initialize %s. (error %d)\n", dev->name,
+		       ret);
+}

drivers/mtd/nand/raw/brcmnand/brcmnand.h

@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __BRCMNAND_H__
+#define __BRCMNAND_H__
+
+#include <linux/types.h>
+#include <linux/io.h>
+
+struct brcmnand_soc {
+	bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
+	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
+	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
+				 bool is_param);
+	void *ctrl;
+};
+
+static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc,
+						 bool is_param)
+{
+	if (soc && soc->prepare_data_bus)
+		soc->prepare_data_bus(soc, true, is_param);
+}
+
+static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc,
+						   bool is_param)
+{
+	if (soc && soc->prepare_data_bus)
+		soc->prepare_data_bus(soc, false, is_param);
+}
+
+static inline u32 brcmnand_readl(void __iomem *addr)
+{
+	/*
+	 * MIPS endianness is configured by boot strap, which also reverses all
+	 * bus endianness (i.e., big-endian CPU + big endian bus ==> native
+	 * endian I/O).
+	 *
+	 * Other architectures (e.g., ARM) either do not support big endian, or
+	 * else leave I/O in little endian mode.
+	 */
+	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_SYS_BIG_ENDIAN))
+		return __raw_readl(addr);
+	else
+		return readl_relaxed(addr);
+}
+
+static inline void brcmnand_writel(u32 val, void __iomem *addr)
+{
+	/* See brcmnand_readl() comments */
+	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_SYS_BIG_ENDIAN))
+		__raw_writel(val, addr);
+	else
+		writel_relaxed(val, addr);
+}
+
+int brcmnand_probe(struct udevice *dev, struct brcmnand_soc *soc);
+int brcmnand_remove(struct udevice *dev);
+
+#ifndef __UBOOT__
+extern const struct dev_pm_ops brcmnand_pm_ops;
+#endif /* __UBOOT__ */
+
+#endif /* __BRCMNAND_H__ */

drivers/mtd/nand/raw/brcmnand/brcmnand_compat.c

@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include "brcmnand_compat.h"
+
+struct clk *devm_clk_get(struct udevice *dev, const char *id)
+{
+	struct clk *clk;
+	int ret;
+
+	clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
+	if (!clk) {
+		debug("%s: can't allocate clock\n", __func__);
+		return ERR_PTR(-ENOMEM);
+	}
+
+	ret = clk_get_by_name(dev, id, clk);
+	if (ret < 0) {
+		debug("%s: can't get clock (ret = %d)!\n", __func__, ret);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+int clk_prepare_enable(struct clk *clk)
+{
+	return clk_enable(clk);
+}
+
+void clk_disable_unprepare(struct clk *clk)
+{
+	clk_disable(clk);
+}
+
+static char *devm_kvasprintf(struct udevice *dev, gfp_t gfp, const char *fmt,
+			     va_list ap)
+{
+	unsigned int len;
+	char *p;
+	va_list aq;
+
+	va_copy(aq, ap);
+	len = vsnprintf(NULL, 0, fmt, aq);
+	va_end(aq);
+
+	p = devm_kmalloc(dev, len + 1, gfp);
+	if (!p)
+		return NULL;
+
+	vsnprintf(p, len + 1, fmt, ap);
+
+	return p;
+}
+
+char *devm_kasprintf(struct udevice *dev, gfp_t gfp, const char *fmt, ...)
+{
+	va_list ap;
+	char *p;
+
+	va_start(ap, fmt);
+	p = devm_kvasprintf(dev, gfp, fmt, ap);
+	va_end(ap);
+
+	return p;
+}

drivers/mtd/nand/raw/brcmnand/brcmnand_compat.h

@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __BRCMNAND_COMPAT_H
+#define __BRCMNAND_COMPAT_H
+
+#include <clk.h>
+#include <dm.h>
+
+struct clk *devm_clk_get(struct udevice *dev, const char *id);
+int clk_prepare_enable(struct clk *clk);
+void clk_disable_unprepare(struct clk *clk);
+
+char *devm_kasprintf(struct udevice *dev, gfp_t gfp, const char *fmt, ...);
+
+#endif /* __BRCMNAND_COMPAT_H */