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Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA

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All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
This commit is contained in:
Lukasz Majewski 2018-02-13 06:34:13 +01:00 committed by Marek Vasut
parent a6fbf94550
commit 21a9f435f3
13 changed files with 1 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
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@ -701,6 +701,7 @@ config ARCH_SOCFPGA
select DM_SPI_FLASH
select DM_SPI
select ENABLE_ARM_SOC_BOOT0_HOOK
select HW_WATCHDOG
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT
select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION

2
include/configs/socfpga_arria10_socdk.h
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@ -9,8 +9,6 @@
#include <asm/arch/base_addr_a10.h>
#define CONFIG_HW_WATCHDOG
/* Booting Linux */
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR

2
include/configs/socfpga_arria5_socdk.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */

2
include/configs/socfpga_cyclone5_socdk.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */

2
include/configs/socfpga_de0_nano_soc.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */

2
include/configs/socfpga_de10_nano.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */

2
include/configs/socfpga_de1_soc.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */

2
include/configs/socfpga_is1.h
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@ -9,8 +9,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x10000000

2
include/configs/socfpga_mcvevk.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */

2
include/configs/socfpga_sockit.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */

2
include/configs/socfpga_socrates.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCrates */

2
include/configs/socfpga_sr1500.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */

2
include/configs/socfpga_vining_fpga.h
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@ -8,8 +8,6 @@
#include <asm/arch/base_addr_ac5.h>
#define CONFIG_HW_WATCHDOG
/* Memory configurations */
#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */