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ARM: socfpga: Add ArriaV ST/SX ID

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Add new FPGA ID for ArriaV ST/D3 or SX/B3 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
This commit is contained in:
Marek Vasut 2019-11-20 22:40:19 +01:00
parent 97a72bc286
commit 2007a730ee
1 changed files with 2 additions and 0 deletions
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2
arch/arm/mach-socfpga/misc_gen5.c
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@ -79,6 +79,8 @@ static const struct {
{ 0x2d02, "Cyclone V, SE/A6 or SX/C6 or ST/D6", "cv_se_a6" },
/* Arria V */
{ 0x2d03, "Arria V, D5", "av_d5" },
/* Arria V ST/SX */
{ 0x2d13, "Arria V, ST/D3 or SX/B3", "av_st_d3" },
};
static int socfpga_fpga_id(const bool print_id)