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x86: Allow disabling IGD on Intel Queensbay

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Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
based graphics card's VGA BIOS and use that for the graphics console.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-10-01 00:36:04 -07:00 committed by Simon Glass
parent 5bf935925b
commit 1f124eba11
4 changed files with 33 additions and 0 deletions
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8
arch/x86/cpu/queensbay/Kconfig
View File

@ -42,4 +42,12 @@ config CPU_ADDR_BITS
int
default 32
config DISABLE_IGD
bool "Disable Integrated Graphics Device (IGD)"
help
Disable the Integrated Graphics Device (IGD) so that it does not
show in the PCI configuration space as a VGA disaplay controller.
This gives a chance for U-Boot to run PCI/PCIe based graphics
card's VGA BIOS and use that card for the graphics console.
endif

19
arch/x86/cpu/queensbay/tnc.c
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@ -23,6 +23,16 @@ static void unprotect_spi_flash(void)
x86_pci_write_config32(TNC_LPC, 0xd8, bc);
}
static void __maybe_unused disable_igd(void)
{
u32 gc;
gc = x86_pci_read_config32(TNC_IGD, IGD_GC);
gc &= ~GMS_MASK;
gc |= VGA_DISABLE;
x86_pci_write_config32(TNC_IGD, IGD_GC, gc);
}
int arch_cpu_init(void)
{
int ret;
@ -39,6 +49,15 @@ int arch_cpu_init(void)
return 0;
}
int arch_early_init_r(void)
{
#ifdef CONFIG_DISABLE_IGD
disable_igd();
#endif
return 0;
}
void cpu_irq_init(void)
{
struct tnc_rcba *rcba;

5
arch/x86/include/asm/arch-queensbay/tnc.h
View File

@ -7,6 +7,11 @@
#ifndef _X86_ARCH_TNC_H_
#define _X86_ARCH_TNC_H_
/* IGD Control Register */
#define IGD_GC 0x50
#define VGA_DISABLE 0x00020000
#define GMS_MASK 0x00700000
/* Memory BAR Enable */
#define MEM_BAR_EN 0x00000001

1
include/configs/crownbay.h
View File

@ -15,6 +15,7 @@
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_SMSC_LPC47M