brain-hackers_pepepper-mirror
/
u-boot-brain
mirror of https://github.com/brain-hackers/u-boot-brain
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

- clk: meson-g12a: missing break 

- sync all Amlogic DT from Linux v5.6-rc2
 - MMC clock fixups
 - add support for Libre Computer AML-S905D-PC and AML-S912-PC
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAl6K4bQACgkQd9zb2sjI
 SdFpIw//QZbwDYFJWb7m3OuutceTWwx6sB/vjYjUBzkRZLBKOWn1WdKmt3PHHcHB
 Mj1CrUGaK29TVSyC654Sn7W75WMWJOQsvLwZVIc+TA6gOGU0P0khn/LitHgIyn9r
 Fo8wCxD9ohVQLfDcgWn/KRkTdX++Sx1IxURvc1ebd82W507XyTjf8dLjgDA6rETF
 3dVlnR/el/UojG0MhxaIce/GVldNukC4Y02Imuw9bV1DvhiXp1GnzVaXqmlChxkr
 rqoKFBelh5c2I85xm8+FunUX9wCDPuMXE75pFOwVX5imAekExaVaZA+y78hWIUTg
 bEFT6Ug0PWaLzZCJAkPKzE3+flJk4tXbG9oXsPIfgGWm7KoC3Lzd6mstpOMzq55V
 NMxvPrFJo7bmPZNM7sIbB/KQYBB1r9dnV+UANXHiRS2G7acBDpueuPX6ki6wiG4v
 OlwfcWGWTk+6ci0271a/05B4rclZqM33rbRUGlheEpHrFPINXksaArdaY1Pl5FIu
 kuP6wg5lyF4G1QuFE68K8OidJticchzh116D6ccD9z3Z5s2KTg555Wp83lLLe+Zi
 2YtNYtEr1yiCUDO9OBaYTHzDK/Tfj5Xz2q1Bny6YAyN48NTiOoeK6R9ZsAyXLDK1
 Qn/rjHR31ZyrnZ7OZ7GQ/rqfyfZDD+/Fq9mDZ9+ScYe0QFpTwY4=
 =PiOt
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next

- clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC
This commit is contained in:
Tom Rini 2020-04-08 08:48:31 -04:00
parent 1f47e2aca4 e13e7c9dae
commit 1ebf50d9bb
51 changed files with 2858 additions and 624 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/dts/Makefile
View File

@ -147,7 +147,9 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905x-libretech-cc.dtb \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-axg-s400.dtb \
meson-g12a-u200.dtb \
meson-g12a-sei510.dtb \

70
arch/arm/dts/meson-axg-s400.dts
View File

@ -60,7 +60,7 @@
serial1 = &uart_A;
};
linein: audio-codec@0 {
linein: audio-codec-0 {
#sound-dai-cells = <0>;
compatible = "everest,es7241";
VDDA-supply = <&vcc_3v3>;
@ -70,7 +70,7 @@
sound-name-prefix = "Linein";
};
lineout: audio-codec@1 {
lineout: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "everest,es7154";
VDD-supply = <&vcc_3v3>;
@ -79,14 +79,14 @@
sound-name-prefix = "Lineout";
};
spdif_dit: audio-codec@2 {
spdif_dit: audio-codec-2 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
dmics: audio-codec@3 {
dmics: audio-codec-3 {
#sound-dai-cells = <0>;
compatible = "dmic-codec";
num-channels = <7>;
@ -95,6 +95,13 @@
sound-name-prefix = "MIC";
};
spdif_dir: audio-codec-4 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
status = "okay";
sound-name-prefix = "DIR";
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
@ -249,6 +256,9 @@
"TODDR_A IN 2", "TDMIN_C OUT",
"TODDR_B IN 2", "TDMIN_C OUT",
"TODDR_C IN 2", "TDMIN_C OUT",
"TODDR_A IN 3", "SPDIFIN Capture",
"TODDR_B IN 3", "SPDIFIN Capture",
"TODDR_C IN 3", "SPDIFIN Capture",
"TODDR_A IN 4", "PDM Capture",
"TODDR_B IN 4", "PDM Capture",
"TODDR_C IN 4", "PDM Capture",
@ -272,31 +282,31 @@
<393216000>;
status = "okay";
dai-link@0 {
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link@1 {
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link@2 {
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link@3 {
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link@4 {
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link@5 {
dai-link-5 {
sound-dai = <&toddr_c>;
};
dai-link@6 {
dai-link-6 {
sound-dai = <&tdmif_c>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-2 = <1 1>;
@ -317,7 +327,7 @@
};
dai-link@7 {
dai-link-7 {
sound-dai = <&spdifout>;
codec {
@ -325,7 +335,15 @@
};
};
dai-link@8 {
dai-link-8 {
sound-dai = <&spdifin>;
codec {
sound-dai = <&spdif_dir>;
};
};
dai-link-9 {
sound-dai = <&pdm>;
codec {
@ -357,6 +375,8 @@
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
interrupt-parent = <&gpio_intc>;
interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
eee-broken-1000t;
};
};
@ -444,7 +464,8 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
sd-uhs-sdr104;
max-frequency = <200000000>;
non-removable;
disable-wp;
@ -461,15 +482,14 @@
/* emmc storage */
&sd_emmc_c {
status = "disabled";
pinctrl-0 = <&emmc_pins>;
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <180000000>;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
@ -481,6 +501,12 @@
vqmmc-supply = <&vddio_boot>;
};
&spdifin {
pinctrl-0 = <&spdif_in_a19_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout {
pinctrl-0 = <&spdif_out_a20_pins>;
pinctrl-names = "default";
@ -543,8 +569,14 @@
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>;
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
};
};
&uart_AO {

273
arch/arm/dts/meson-axg.dtsi
View File

File diff suppressed because it is too large Load Diff

478
arch/arm/dts/meson-g12-common.dtsi
View File

@ -5,51 +5,42 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/axg-audio-clkc.h>
#include <dt-bindings/clock/g12a-clkc.h>
#include <dt-bindings/clock/g12a-aoclkc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_A";
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_B";
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
simplefb_cvbs: framebuffer-cvbs {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-cvbs";
clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_HTX_PCLK>,
<&clkc CLKID_VPU_INTR>;
status = "disabled";
};
tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_C";
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
simplefb_hdmi: framebuffer-hdmi {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-hdmi";
clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_HTX_PCLK>,
<&clkc CLKID_VPU_INTR>;
status = "disabled";
};
};
efuse: efuse {
@ -58,6 +49,7 @@
#address-cells = <1>;
#size-cells = <1>;
read-only;
secure-monitor = <&sm>;
};
psci {
@ -95,6 +87,94 @@
#size-cells = <2>;
ranges;
pcie: pcie@fc000000 {
compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
reg = <0x0 0xfc000000 0x0 0x400000
0x0 0xff648000 0x0 0x2000
0x0 0xfc400000 0x0 0x200000>;
reg-names = "elbi", "cfg", "config";
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x0 0xff>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000
0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
clocks = <&clkc CLKID_PCIE_PHY
&clkc CLKID_PCIE_COMB
&clkc CLKID_PCIE_PLL>;
clock-names = "general",
"pclk",
"port";
resets = <&reset RESET_PCIE_CTRL_A>,
<&reset RESET_PCIE_APB>;
reset-names = "port",
"apb";
num-lanes = <1>;
phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
phy-names = "pcie";
status = "disabled";
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
thermal-sensors = <&cpu_temp>;
trips {
cpu_passive: cpu-passive {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_hot: cpu-hot {
temperature = <95000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "hot";
};
cpu_critical: cpu-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
};
ddr_thermal: ddr-thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
thermal-sensors = <&ddr_temp>;
trips {
ddr_passive: ddr-passive {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
ddr_critical: ddr-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map {
trip = <&ddr_passive>;
cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac",
"snps,dwmac-3.70a",
@ -1356,6 +1436,26 @@
};
};
cpu_temp: temperature-sensor@34800 {
compatible = "amlogic,g12a-cpu-thermal",
"amlogic,g12a-thermal";
reg = <0x0 0x34800 0x0 0x50>;
interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_TS>;
#thermal-sensor-cells = <0>;
amlogic,ao-secure = <&sec_AO>;
};
ddr_temp: temperature-sensor@34c00 {
compatible = "amlogic,g12a-ddr-thermal",
"amlogic,g12a-thermal";
reg = <0x0 0x34c00 0x0 0x50>;
interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_TS>;
#thermal-sensor-cells = <0>;
amlogic,ao-secure = <&sec_AO>;
};
usb2_phy0: phy@36000 {
compatible = "amlogic,g12a-usb2-phy";
reg = <0x0 0x36000 0x0 0x2000>;
@ -1457,290 +1557,6 @@
};
};
pdm: audio-controller@40000 {
compatible = "amlogic,g12a-pdm",
"amlogic,axg-pdm";
reg = <0x0 0x40000 0x0 0x34>;
#sound-dai-cells = <0>;
sound-name-prefix = "PDM";
clocks = <&clkc_audio AUD_CLKID_PDM>,
<&clkc_audio AUD_CLKID_PDM_DCLK>,
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
clock-names = "pclk", "dclk", "sysclk";
status = "disabled";
};
audio: bus@42000 {
compatible = "simple-bus";
reg = <0x0 0x42000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
clkc_audio: clock-controller@0 {
status = "disabled";
compatible = "amlogic,g12a-audio-clkc";
reg = <0x0 0x0 0x0 0xb4>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clkc CLKID_AUDIO>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL3>,
<&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_FCLK_DIV3>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_GP0_PLL>;
clock-names = "pclk",
"mst_in0",
"mst_in1",
"mst_in2",
"mst_in3",
"mst_in4",
"mst_in5",
"mst_in6",
"mst_in7";
resets = <&reset RESET_AUDIO>;
};
toddr_a: audio-controller@100 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x100 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_A";
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
resets = <&arb AXG_ARB_TODDR_A>;
status = "disabled";
};
toddr_b: audio-controller@140 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x140 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_B";
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
resets = <&arb AXG_ARB_TODDR_B>;
status = "disabled";
};
toddr_c: audio-controller@180 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x180 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_C";
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
resets = <&arb AXG_ARB_TODDR_C>;
status = "disabled";
};
frddr_a: audio-controller@1c0 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x1c0 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_A";
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
resets = <&arb AXG_ARB_FRDDR_A>;
status = "disabled";
};
frddr_b: audio-controller@200 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x200 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_B";
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
resets = <&arb AXG_ARB_FRDDR_B>;
status = "disabled";
};
frddr_c: audio-controller@240 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x240 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_C";
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
resets = <&arb AXG_ARB_FRDDR_C>;
status = "disabled";
};
arb: reset-controller@280 {
status = "disabled";
compatible = "amlogic,meson-axg-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};
tdmin_a: audio-controller@300 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x300 0x0 0x40>;
sound-name-prefix = "TDMIN_A";
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_b: audio-controller@340 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x340 0x0 0x40>;
sound-name-prefix = "TDMIN_B";
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_c: audio-controller@380 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x380 0x0 0x40>;
sound-name-prefix = "TDMIN_C";
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_lb: audio-controller@3c0 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x3c0 0x0 0x40>;
sound-name-prefix = "TDMIN_LB";
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
status = "disabled";
};
spdifout: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
clock-names = "pclk", "mclk";
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x500 0x0 0x40>;
sound-name-prefix = "TDMOUT_A";
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_b: audio-controller@540 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x540 0x0 0x40>;
sound-name-prefix = "TDMOUT_B";
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_c: audio-controller@580 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x580 0x0 0x40>;
sound-name-prefix = "TDMOUT_C";
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifout_b: audio-controller@680 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x680 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT_B";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
clock-names = "pclk", "mclk";
status = "disabled";
};
tohdmitx: audio-controller@744 {
compatible = "amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOHDMITX";
status = "disabled";
};
};
usb3_pcie_phy: phy@46000 {
compatible = "amlogic,g12a-usb3-pcie-phy";
reg = <0x0 0x46000 0x0 0x2000>;
@ -2152,6 +1968,29 @@
};
};
vdec: video-decoder@ff620000 {
compatible = "amlogic,g12a-vdec";
reg = <0x0 0xff620000 0x0 0x10000>,
<0x0 0xffd0e180 0x0 0xe4>;
reg-names = "dos", "esparser";
interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "vdec", "esparser";
amlogic,ao-sysctrl = <&rti>;
amlogic,canvas = <&canvas>;
clocks = <&clkc CLKID_PARSER>,
<&clkc CLKID_DOS>,
<&clkc CLKID_VDEC_1>,
<&clkc CLKID_VDEC_HEVC>,
<&clkc CLKID_VDEC_HEVCF>;
clock-names = "dos_parser", "dos", "vdec_1",
"vdec_hevc", "vdec_hevcf";
resets = <&reset RESET_PARSER>;
reset-names = "esparser";
};
vpu: vpu@ff900000 {
compatible = "amlogic,meson-g12a-vpu";
reg = <0x0 0xff900000 0x0 0x100000>,
@ -2388,10 +2227,10 @@
compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
reg = <0x0 0xffe40000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gpu", "mmu", "job";
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&clkc CLKID_MALI>;
resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
@ -2409,6 +2248,7 @@
assigned-clock-rates = <0>, /* Do Nothing */
<800000000>,
<0>; /* Do Nothing */
#cooling-cells = <2>;
};
};

398
arch/arm/dts/meson-g12.dtsi Normal file
View File

@ -0,0 +1,398 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/clock/axg-audio-clkc.h>
#include <dt-bindings/power/meson-g12a-power.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
/ {
tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_A";
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_B";
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_C";
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
};
&apb {
pdm: audio-controller@40000 {
compatible = "amlogic,g12a-pdm",
"amlogic,axg-pdm";
reg = <0x0 0x40000 0x0 0x34>;
#sound-dai-cells = <0>;
sound-name-prefix = "PDM";
clocks = <&clkc_audio AUD_CLKID_PDM>,
<&clkc_audio AUD_CLKID_PDM_DCLK>,
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
clock-names = "pclk", "dclk", "sysclk";
status = "disabled";
};
audio: bus@42000 {
compatible = "simple-bus";
reg = <0x0 0x42000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
clkc_audio: clock-controller@0 {
status = "disabled";
compatible = "amlogic,g12a-audio-clkc";
reg = <0x0 0x0 0x0 0xb4>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clkc CLKID_AUDIO>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL3>,
<&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_FCLK_DIV3>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_GP0_PLL>;
clock-names = "pclk",
"mst_in0",
"mst_in1",
"mst_in2",
"mst_in3",
"mst_in4",
"mst_in5",
"mst_in6",
"mst_in7";
resets = <&reset RESET_AUDIO>;
};
toddr_a: audio-controller@100 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x100 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_A";
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
resets = <&arb AXG_ARB_TODDR_A>,
<&clkc_audio AUD_RESET_TODDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
toddr_b: audio-controller@140 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x140 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_B";
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
resets = <&arb AXG_ARB_TODDR_B>,
<&clkc_audio AUD_RESET_TODDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
toddr_c: audio-controller@180 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x180 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_C";
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
resets = <&arb AXG_ARB_TODDR_C>,
<&clkc_audio AUD_RESET_TODDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_a: audio-controller@1c0 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x1c0 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_A";
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
resets = <&arb AXG_ARB_FRDDR_A>,
<&clkc_audio AUD_RESET_FRDDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
frddr_b: audio-controller@200 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x200 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_B";
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
resets = <&arb AXG_ARB_FRDDR_B>,
<&clkc_audio AUD_RESET_FRDDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_c: audio-controller@240 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x240 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_C";
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
resets = <&arb AXG_ARB_FRDDR_C>,
<&clkc_audio AUD_RESET_FRDDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
arb: reset-controller@280 {
status = "disabled";
compatible = "amlogic,meson-axg-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};
tdmin_a: audio-controller@300 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x300 0x0 0x40>;
sound-name-prefix = "TDMIN_A";
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_b: audio-controller@340 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x340 0x0 0x40>;
sound-name-prefix = "TDMIN_B";
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_c: audio-controller@380 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x380 0x0 0x40>;
sound-name-prefix = "TDMIN_C";
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_lb: audio-controller@3c0 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x3c0 0x0 0x40>;
sound-name-prefix = "TDMIN_LB";
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
resets = <&clkc_audio AUD_RESET_SPDIFIN>;
status = "disabled";
};
spdifout: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x500 0x0 0x40>;
sound-name-prefix = "TDMOUT_A";
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_b: audio-controller@540 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x540 0x0 0x40>;
sound-name-prefix = "TDMOUT_B";
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_c: audio-controller@580 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x580 0x0 0x40>;
sound-name-prefix = "TDMOUT_C";
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifout_b: audio-controller@680 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x680 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT_B";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
status = "disabled";
};
tohdmitx: audio-controller@744 {
compatible = "amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOHDMITX";
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
status = "disabled";
};
};
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
};
&simplefb_cvbs {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&simplefb_hdmi {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};

64
arch/arm/dts/meson-g12a-sei510.dts
View File

@ -129,6 +129,25 @@
enable-active-high;
};
vddcpu: regulator-vddcpu {
/*
* SY8120B1ABC DC/DC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
vin-supply = <&dc_in>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddio_ao1v8: regulator-vddio_ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
@ -297,6 +316,34 @@
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
@ -339,6 +386,20 @@
pinctrl-names = "default";
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
@ -377,6 +438,9 @@
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;

54
arch/arm/dts/meson-g12a-u200.dts
View File

@ -129,6 +129,24 @@
regulator-always-on;
};
vddcpu: regulator-vddcpu {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
vin-supply = <&main_12v>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
};
&cec_AO {
@ -145,6 +163,34 @@
hdmi-phandle = <&hdmi_tx>;
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
@ -197,6 +243,14 @@
pinctrl-names = "default";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
/* SD card */
&sd_emmc_b {
status = "okay";

33
arch/arm/dts/meson-g12a.dtsi
View File

@ -3,8 +3,7 @@
* Copyright (c) 2018 Amlogic, Inc. All rights reserved.
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/power/meson-g12a-power.h>
#include "meson-g12.dtsi"
/ {
compatible = "amlogic,g12a";
@ -19,6 +18,7 @@
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@ -27,6 +27,7 @@
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
@ -35,6 +36,7 @@
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
@ -43,6 +45,7 @@
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
@ -111,14 +114,22 @@
};
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

25
arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts
View File

@ -14,3 +14,28 @@
/ {
compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
};
/*
* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
* an USB3.0 Type A connector and a M.2 Key M slot.
* The PHY driving these differential lines is shared between
* the USB3.0 controller and the PCIe Controller, thus only
* a single controller can use it.
* If the MCU is configured to mux the PCIe/USB3.0 differential lines
* to the M.2 Key M slot, uncomment the following block to disable
* USB3.0 from the USB Complex and enable the PCIe controller.
* The End User is not expected to uncomment the following except for
* testing purposes, but instead rely on the firmware/bootloader to
* update these nodes accordingly if PCIe mode is selected by the MCU.
*/
/*
&pcie {
status = "okay";
};
&usb {
phys = <&usb2_phy0>, <&usb2_phy1>;
phy-names = "usb2-phy0", "usb2-phy1";
};
*/

2
arch/arm/dts/meson-g12b-odroid-n2.dts
View File

@ -12,7 +12,7 @@
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "hardkernel,odroid-n2", "amlogic,g12b";
compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b";
model = "Hardkernel ODROID-N2";
aliases {

26
arch/arm/dts/meson-g12b.dtsi
View File

@ -4,8 +4,7 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/power/meson-g12a-power.h>
#include "meson-g12.dtsi"
/ {
compatible = "amlogic,g12b";
@ -49,7 +48,9 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@ -57,7 +58,9 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu100: cpu@100 {
@ -65,7 +68,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x100>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu101: cpu@101 {
@ -73,7 +78,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu102: cpu@102 {
@ -81,7 +88,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x102>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu103: cpu@103 {
@ -89,7 +98,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x103>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
@ -102,14 +113,3 @@
compatible = "amlogic,g12b-clkc";
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
};

375
arch/arm/dts/meson-gx-libretech-pc.dtsi Normal file
View File

@ -0,0 +1,375 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019 BayLibre SAS.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
/* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
update-button {
label = "update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <1300000>;
};
};
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
spi0 = &spifc;
};
chosen {
stdout-path = "serial0:115200n8";
};
cvbs-connector {
compatible = "composite-video-connector";
status = "disabled";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
power-button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
ao_5v: regulator-ao_5v {
compatible = "regulator-fixed";
regulator-name = "AO_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
dc_in: regulator-dc_in {
compatible = "regulator-fixed";
regulator-name = "DC_IN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK_ACTIVITY;
gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
};
blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
panic-indicator;
};
};
vcc_card: regulator-vcc_card {
compatible = "regulator-fixed";
regulator-name = "VCC_CARD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddio_ao3v3>;
gpio = <&gpio GPIODV_4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc5v: regulator-vcc5v {
compatible = "regulator-fixed";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&ao_5v>;
gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&ao_5v>;
regulator-always-on;
};
vddio_ao3v3: regulator-vddio_ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&ao_5v>;
regulator-always-on;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddio_ao3v3>;
regulator-always-on;
};
vddio_card: regulator-vddio-card {
compatible = "regulator-gpio";
regulator-name = "VDDIO_CARD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>,
<1800000 1>;
regulator-settling-time-up-us = <200>;
regulator-settling-time-down-us = <50000>;
};
};
&cec_AO {
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
status = "okay";
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
pinctrl-0 = <&eth_pins>, <&eth_phy_irq_pins>;
pinctrl-names = "default";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
phy-mode = "rgmii";
status = "okay";
};
&external_mdio {
external_phy: ethernet-phy@0 {
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
};
};
&pinctrl_periphs {
/*
* Make sure the reset pin of the usb HUB is driven high to take
* it out of reset.
*/
usb1_rst_pins: usb1_rst_irq {
mux {
groups = "GPIODV_3";
function = "gpio_periphs";
bias-disable;
output-high;
};
};
/* Make sure the phy irq pin is properly configured as input */
eth_phy_irq_pins: eth_phy_irq {
mux {
groups = "GPIOZ_15";
function = "gpio_periphs";
bias-disable;
output-disable;
};
};
};
&hdmi_tx {
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc5v>;
status = "okay";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
status = "okay";
};
&i2c_C {
pinctrl-0 = <&i2c_c_dv18_pins>;
pinctrl-names = "default";
status = "okay";
rtc: rtc@51 {
reg = <0x51>;
compatible = "nxp,pcf8563";
#clock-cells = <0>;
clock-output-names = "rtc_clkout";
};
};
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_3_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ab {
pinctrl-0 = <&pwm_b_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&saradc {
vref-supply = <&vddio_ao18>;
status = "okay";
};
/* SD card */
&sd_emmc_b {
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <200000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vcc_card>;
vqmmc-supply = <&vddio_card>;
status = "okay";
};
/* eMMC */
&sd_emmc_c {
pinctrl-0 = <&emmc_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_boot>;
status = "okay";
};
&spifc {
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
status = "okay";
gd25lq128: spi-flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <12000000>;
};
};
&uart_AO {
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb0 {
status = "okay";
};
&usb2_phy0 {
pinctrl-0 = <&usb1_rst_pins>;
pinctrl-names = "default";
phy-supply = <&vcc5v>;
};
&usb2_phy1 {
phy-supply = <&vcc5v>;
};

87
arch/arm/dts/meson-gx.dtsi
View File

@ -50,13 +50,35 @@
};
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
simplefb_cvbs: framebuffer-cvbs {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-cvbs";
power-domains = <&pwrc_vpu>;
status = "disabled";
};
simplefb_hdmi: framebuffer-hdmi {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-hdmi";
power-domains = <&pwrc_vpu>;
status = "disabled";
};
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -65,7 +87,7 @@
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -74,7 +96,7 @@
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -83,7 +105,7 @@
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -139,6 +161,7 @@
#address-cells = <1>;
#size-cells = <1>;
read-only;
secure-monitor = <&sm>;
sn: sn@14 {
reg = <0x14 0x10>;
@ -198,7 +221,7 @@
};
reset: reset-controller@4404 {
compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
compatible = "amlogic,meson-gxbb-reset";
reg = <0x0 0x04404 0x0 0x9c>;
#reset-cells = <1>;
};
@ -218,7 +241,7 @@
};
i2c_A: i2c@8500 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@ -262,8 +285,13 @@
status = "disabled";
};
clock-measure@8758 {
compatible = "amlogic,meson-gx-clk-measure";
reg = <0x0 0x8758 0x0 0x10>;
};
i2c_B: i2c@87c0 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@ -272,7 +300,7 @@
};
i2c_C: i2c@87e0 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@ -290,7 +318,7 @@
};
spifc: spi@8c80 {
compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
compatible = "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
@ -298,7 +326,7 @@
};
watchdog@98d0 {
compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
compatible = "amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>;
clocks = <&xtal>;
};
@ -364,6 +392,7 @@
compatible = "amlogic,meson-gx-ao-cec";
reg = <0x0 0x00100 0x0 0x14>;
interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
sec_AO: ao-secure@140 {
@ -387,7 +416,7 @@
};
i2c_AO: i2c@500 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x500 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@ -410,7 +439,21 @@
};
};
periphs: periphs@c8834000 {
vdec: video-codec@c8820000 {
compatible = "amlogic,gx-vdec";
reg = <0x0 0xc8820000 0x0 0x10000>,
<0x0 0xc110a580 0x0 0xe4>;
reg-names = "dos", "esparser";
interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "vdec", "esparser";
amlogic,ao-sysctrl = <&sysctrl_AO>;
amlogic,canvas = <&canvas>;
};
periphs: bus@c8834000 {
compatible = "simple-bus";
reg = <0x0 0xc8834000 0x0 0x2000>;
#address-cells = <2>;
@ -449,7 +492,7 @@
};
mailbox: mailbox@404 {
compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
compatible = "amlogic,meson-gxbb-mhu";
reg = <0 0x404 0 0x4c>;
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
@ -459,11 +502,15 @@
};
ethmac: ethernet@c9410000 {
compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x4>;
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
compatible = "amlogic,meson-gxbb-dwmac",
"snps,dwmac-3.70a",
"snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000>,
<0x0 0xc8834540 0x0 0x4>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
status = "disabled";
};
@ -499,12 +546,12 @@
vpu: vpu@d0100000 {
compatible = "amlogic,meson-gx-vpu";
reg = <0x0 0xd0100000 0x0 0x100000>,
<0x0 0xc883c000 0x0 0x1000>,
<0x0 0xc8838000 0x0 0x1000>;
reg-names = "vpu", "hhi", "dmc";
<0x0 0xc883c000 0x0 0x1000>;
reg-names = "vpu", "hhi";
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
amlogic,canvas = <&canvas>;
/* CVBS VDAC output port */
cvbs_vdac_port: port@0 {

26
arch/arm/dts/meson-gxbb-nanopi-k2.dts
View File

@ -10,6 +10,7 @@
/ {
compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
model = "FriendlyARM NanoPi K2";
aliases {
serial0 = &uart_AO;
@ -154,10 +155,6 @@
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
@ -166,6 +163,11 @@
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
@ -191,7 +193,7 @@
pinctrl-names = "default";
};
&pinctrl_aobus {
&gpio_ao {
gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
"VCCK En", "CON1 Header Pin31",
"I2S Header Pin6", "IR In", "I2S Header Pin7",
@ -201,7 +203,7 @@
"";
};
&pinctrl_periphs {
&gpio {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
@ -273,11 +275,14 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <200000000>;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddio_ao3v3>;
@ -301,12 +306,11 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
max-frequency = <200000000>;
sd-uhs-ddr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_tf>;

100
arch/arm/dts/meson-gxbb-odroidc2.dts
View File

@ -36,8 +36,15 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/*
* signal name from schematics: PWREN
*/
gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
enable-active-high;
/*
* signal name from schematics: USB_POWER
*/
vin-supply = <&p5v0>;
};
leds {
@ -50,18 +57,38 @@
};
};
p5v0: regulator-p5v0 {
compatible = "regulator-fixed";
regulator-name = "P5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
hdmi_p5v0: regulator-hdmi_p5v0 {
compatible = "regulator-fixed";
regulator-name = "HDMI_P5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/* AP2331SA-7 */
vin-supply = <&p5v0>;
};
tflash_vdd: regulator-tflash_vdd {
/*
* signal name from schematics: TFLASH_VDD_EN
*/
compatible = "regulator-fixed";
regulator-name = "TFLASH_VDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* signal name from schematics: TFLASH_VDD_EN
*/
gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
enable-active-high;
/* U16 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
tf_io: gpio-regulator-tf_io {
@ -77,8 +104,10 @@
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0
1800000 1>;
states = <3300000 0>,
<1800000 1>;
/* U12/U13 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
vcc1v8: regulator-vcc1v8 {
@ -86,6 +115,9 @@
regulator-name = "VCC1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
/* U18 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
vcc3v3: regulator-vcc3v3 {
@ -95,6 +127,36 @@
regulator-max-microvolt = <3300000>;
};
vddio_ao1v8: regulator-vddio-ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
/* U17 RT9179GB */
vin-supply = <&p5v0>;
};
vddio_ao3v3: regulator-vddio-ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
/* U11 MP2161GJ-C499 */
vin-supply = <&p5v0>;
};
ddr3_1v5: regulator-ddr3_1v5 {
compatible = "regulator-fixed";
regulator-name = "DDR3_1V5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
/* U15 MP2161GJ-C499 */
vin-supply = <&p5v0>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
@ -126,10 +188,6 @@
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
amlogic,tx-delay-ns = <2>;
mdio {
@ -140,10 +198,14 @@
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
eee-broken-1000t;
};
};
};
@ -167,6 +229,7 @@
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&hdmi_p5v0>;
};
&hdmi_tx_tmds_port {
@ -187,7 +250,7 @@
pinctrl-names = "default";
};
&pinctrl_aobus {
&gpio_ao {
gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
"USB HUB nRESET", "USB OTG Power En",
"J7 Header Pin2", "IR In", "J7 Header Pin4",
@ -197,7 +260,7 @@
"";
};
&pinctrl_periphs {
&gpio {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
@ -256,11 +319,14 @@
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&tflash_vdd>;
vqmmc-supply = <&tf_io>;
@ -274,7 +340,7 @@
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
max-frequency = <100000000>;
max-frequency = <200000000>;
non-removable;
disable-wp;
cap-mmc-highspeed;
@ -293,7 +359,7 @@
};
&usb0_phy {
status = "okay";
status = "disabled";
phy-supply = <&usb_otg_pwr>;
};
@ -303,7 +369,7 @@
};
&usb0 {
status = "okay";
status = "disabled";
};
&usb1 {

9
arch/arm/dts/meson-gxbb-p200.dts
View File

@ -68,10 +68,6 @@
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
@ -80,6 +76,11 @@
eth_phy0: ethernet-phy@3 {
/* Micrel KSZ9031 (0x00221620) */
reg = <3>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;

2
arch/arm/dts/meson-gxbb-p201.dts
View File

@ -21,6 +21,6 @@
phy-mode = "rmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-delays-us = <0>, <10000>, <1000000>;
snps,reset-active-low;
};

9
arch/arm/dts/meson-gxbb-p20x.dtsi
View File

@ -46,8 +46,8 @@
gpios-states = <1>;
/* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
states = <1800000 0
3300000 1>;
states = <1800000 0>,
<3300000 1>;
regulator-settling-time-up-us = <10000>;
regulator-settling-time-down-us = <150000>;
@ -165,11 +165,14 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;

118
arch/arm/dts/meson-gxbb.dtsi
View File

@ -81,6 +81,7 @@
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
bias-disable;
};
};
@ -89,6 +90,7 @@
groups = "uart_cts_ao_a",
"uart_rts_ao_a";
function = "uart_ao";
bias-disable;
};
};
@ -96,6 +98,7 @@
mux {
groups = "uart_tx_ao_b", "uart_rx_ao_b";
function = "uart_ao_b";
bias-disable;
};
};
@ -104,6 +107,7 @@
groups = "uart_cts_ao_b",
"uart_rts_ao_b";
function = "uart_ao_b";
bias-disable;
};
};
@ -111,6 +115,7 @@
mux {
groups = "remote_input_ao";
function = "remote_input_ao";
bias-disable;
};
};
@ -119,6 +124,7 @@
groups = "i2c_sck_ao",
"i2c_sda_ao";
function = "i2c_ao";
bias-disable;
};
};
@ -126,6 +132,7 @@
mux {
groups = "pwm_ao_a_3";
function = "pwm_ao_a_3";
bias-disable;
};
};
@ -133,6 +140,7 @@
mux {
groups = "pwm_ao_a_6";
function = "pwm_ao_a_6";
bias-disable;
};
};
@ -140,6 +148,7 @@
mux {
groups = "pwm_ao_a_12";
function = "pwm_ao_a_12";
bias-disable;
};
};
@ -147,6 +156,7 @@
mux {
groups = "pwm_ao_b";
function = "pwm_ao_b";
bias-disable;
};
};
@ -154,6 +164,7 @@
mux {
groups = "i2s_am_clk";
function = "i2s_out_ao";
bias-disable;
};
};
@ -161,6 +172,7 @@
mux {
groups = "i2s_out_ao_clk";
function = "i2s_out_ao";
bias-disable;
};
};
@ -168,6 +180,7 @@
mux {
groups = "i2s_out_lr_clk";
function = "i2s_out_ao";
bias-disable;
};
};
@ -175,6 +188,7 @@
mux {
groups = "i2s_out_ch01_ao";
function = "i2s_out_ao";
bias-disable;
};
};
@ -182,6 +196,7 @@
mux {
groups = "i2s_out_ch23_ao";
function = "i2s_out_ao";
bias-disable;
};
};
@ -189,6 +204,7 @@
mux {
groups = "i2s_out_ch45_ao";
function = "i2s_out_ao";
bias-disable;
};
};
@ -203,6 +219,7 @@
mux {
groups = "spdif_out_ao_13";
function = "spdif_out_ao";
bias-disable;
};
};
@ -210,6 +227,7 @@
mux {
groups = "ao_cec";
function = "cec_ao";
bias-disable;
};
};
@ -217,6 +235,7 @@
mux {
groups = "ee_cec";
function = "cec_ao";
bias-disable;
};
};
};
@ -280,6 +299,12 @@
&clkc_AO {
compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
clocks = <&xtal>, <&clkc CLKID_CLK81>;
clock-names = "xtal", "mpeg-clk";
};
&efuse {
clocks = <&clkc CLKID_EFUSE>;
};
&ethmac {
@ -311,6 +336,8 @@
clkc: clock-controller {
compatible = "amlogic,gxbb-clkc";
#clock-cells = <1>;
clocks = <&xtal>;
clock-names = "xtal";
};
};
@ -354,11 +381,17 @@
};
emmc_pins: emmc {
mux {
mux-0 {
groups = "emmc_nand_d07",
"emmc_cmd",
"emmc_clk";
"emmc_cmd";
function = "emmc";
bias-pull-up;
};
mux-1 {
groups = "emmc_clk";
function = "emmc";
bias-disable;
};
};
@ -366,6 +399,7 @@
mux {
groups = "emmc_ds";
function = "emmc";
bias-pull-down;
};
};
@ -373,9 +407,6 @@
mux {
groups = "BOOT_8";
function = "gpio_periphs";
};
cfg-pull-down {
pins = "BOOT_8";
bias-pull-down;
};
};
@ -387,6 +418,7 @@
"nor_c",
"nor_cs";
function = "nor";
bias-disable;
};
};
@ -396,6 +428,7 @@
"spi_mosi",
"spi_sclk";
function = "spi";
bias-disable;
};
};
@ -403,18 +436,25 @@
mux {
groups = "spi_ss0";
function = "spi";
bias-disable;
};
};
sdcard_pins: sdcard {
mux {
mux-0 {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_cmd",
"sdcard_clk";
"sdcard_cmd";
function = "sdcard";
bias-pull-up;
};
mux-1 {
groups = "sdcard_clk";
function = "sdcard";
bias-disable;
};
};
@ -422,22 +462,25 @@
mux {
groups = "CARD_2";
function = "gpio_periphs";
};
cfg-pull-down {
pins = "CARD_2";
bias-pull-down;
};
};
sdio_pins: sdio {
mux {
mux-0 {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_cmd",
"sdio_clk";
"sdio_cmd";
function = "sdio";
bias-pull-up;
};
mux-1 {
groups = "sdio_clk";
function = "sdio";
bias-disable;
};
};
@ -445,9 +488,6 @@
mux {
groups = "GPIOX_4";
function = "gpio_periphs";
};
cfg-pull-down {
pins = "GPIOX_4";
bias-pull-down;
};
};
@ -456,6 +496,7 @@
mux {
groups = "sdio_irq";
function = "sdio";
bias-disable;
};
};
@ -464,6 +505,7 @@
groups = "uart_tx_a",
"uart_rx_a";
function = "uart_a";
bias-disable;
};
};
@ -472,6 +514,7 @@
groups = "uart_cts_a",
"uart_rts_a";
function = "uart_a";
bias-disable;
};
};
@ -480,6 +523,7 @@
groups = "uart_tx_b",
"uart_rx_b";
function = "uart_b";
bias-disable;
};
};
@ -488,6 +532,7 @@
groups = "uart_cts_b",
"uart_rts_b";
function = "uart_b";
bias-disable;
};
};
@ -496,6 +541,7 @@
groups = "uart_tx_c",
"uart_rx_c";
function = "uart_c";
bias-disable;
};
};
@ -504,6 +550,7 @@
groups = "uart_cts_c",
"uart_rts_c";
function = "uart_c";
bias-disable;
};
};
@ -512,6 +559,7 @@
groups = "i2c_sck_a",
"i2c_sda_a";
function = "i2c_a";
bias-disable;
};
};
@ -520,6 +568,7 @@
groups = "i2c_sck_b",
"i2c_sda_b";
function = "i2c_b";
bias-disable;
};
};
@ -528,6 +577,7 @@
groups = "i2c_sck_c",
"i2c_sda_c";
function = "i2c_c";
bias-disable;
};
};
@ -548,6 +598,7 @@
"eth_txd2",
"eth_txd3";
function = "eth";
bias-disable;
};
};
@ -563,6 +614,7 @@
"eth_txd0",
"eth_txd1";
function = "eth";
bias-disable;
};
};
@ -570,6 +622,7 @@
mux {
groups = "pwm_a_x";
function = "pwm_a_x";
bias-disable;
};
};
@ -577,6 +630,7 @@
mux {
groups = "pwm_a_y";
function = "pwm_a_y";
bias-disable;
};
};
@ -584,6 +638,7 @@
mux {
groups = "pwm_b";
function = "pwm_b";
bias-disable;
};
};
@ -591,6 +646,7 @@
mux {
groups = "pwm_d";
function = "pwm_d";
bias-disable;
};
};
@ -598,6 +654,7 @@
mux {
groups = "pwm_e";
function = "pwm_e";
bias-disable;
};
};
@ -605,6 +662,7 @@
mux {
groups = "pwm_f_x";
function = "pwm_f_x";
bias-disable;
};
};
@ -612,6 +670,7 @@
mux {
groups = "pwm_f_y";
function = "pwm_f_y";
bias-disable;
};
};
@ -619,6 +678,7 @@
mux {
groups = "hdmi_hpd";
function = "hdmi_hpd";
bias-disable;
};
};
@ -626,6 +686,7 @@
mux {
groups = "hdmi_sda", "hdmi_scl";
function = "hdmi_i2c";
bias-disable;
};
};
@ -633,6 +694,7 @@
mux {
groups = "i2sout_ch23_y";
function = "i2s_out";
bias-disable;
};
};
@ -640,6 +702,7 @@
mux {
groups = "i2sout_ch45_y";
function = "i2s_out";
bias-disable;
};
};
@ -647,6 +710,7 @@
mux {
groups = "i2sout_ch67_y";
function = "i2s_out";
bias-disable;
};
};
@ -654,6 +718,7 @@
mux {
groups = "spdif_out_y";
function = "spdif_out";
bias-disable;
};
};
};
@ -734,6 +799,12 @@
resets = <&reset RESET_SD_EMMC_C>;
};
&simplefb_hdmi {
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
};
&spicc {
clocks = <&clkc CLKID_SPICC>;
clock-names = "core";
@ -774,3 +845,14 @@
compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
power-domains = <&pwrc_vpu>;
};
&vdec {
compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
clocks = <&clkc CLKID_DOS_PARSER>,
<&clkc CLKID_DOS>,
<&clkc CLKID_VDEC_1>,
<&clkc CLKID_VDEC_HEVC>;
clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
resets = <&reset RESET_PARSER>;
reset-names = "esparser";
};

2
arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
View File

@ -14,7 +14,7 @@
/ {
compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
"amlogic,meson-gxl";
model = "Libre Computer Board AML-S805X-AC";
model = "Libre Computer AML-S805X-AC";
aliases {
serial0 = &uart_AO;

7
arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi Normal file
View File

@ -0,0 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-gx-u-boot.dtsi"

16
arch/arm/dts/meson-gxl-s905d-libretech-pc.dts Normal file
View File

@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
/dts-v1/;
#include "meson-gxl-s905d.dtsi"
#include "meson-gx-libretech-pc.dtsi"
/ {
compatible = "libretech,aml-s905d-pc", "amlogic,s905d",
"amlogic,meson-gxl";
model = "Libre Computer AML-S905D-PC";
};

12
arch/arm/dts/meson-gxl-s905d.dtsi Normal file
View File

@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Endless Computers, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*/
#include "meson-gxl.dtsi"
#include "meson-gxl-mali.dtsi"
/ {
compatible = "amlogic,s905d", "amlogic,meson-gxl";
};

20
arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
View File

@ -33,11 +33,9 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
button@0 {
power-button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
@ -110,10 +108,10 @@
};
&ir {
linux,rc-map-name = "rc-geekbox";
linux,rc-map-name = "rc-khadas";
};
&pinctrl_aobus {
&gpio_ao {
gpio-line-names = "UART TX",
"UART RX",
"Power Key In",
@ -128,7 +126,7 @@
"";
};
&pinctrl_periphs {
&gpio {
gpio-line-names = /* Bank GPIOZ */
"", "", "", "", "", "", "",
"", "", "", "", "", "", "",
@ -188,6 +186,16 @@
};
};
&uart_A {
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
&uart_AO {
status = "okay";

26
arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
View File

@ -12,8 +12,9 @@
#include "meson-gxl-s905x.dtsi"
/ {
compatible = "libretech,cc", "amlogic,s905x", "amlogic,meson-gxl";
model = "Libre Computer Board AML-S905X-CC";
compatible = "libretech,aml-s905x-cc", "amlogic,s905x",
"amlogic,meson-gxl";
model = "Libre Computer AML-S905X-CC";
aliases {
serial0 = &uart_AO;
@ -115,11 +116,13 @@
regulator-max-microvolt = <1800000>;
};
/* This is provided by LDOs on the eMMC daugther card */
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
};
};
@ -164,7 +167,7 @@
};
};
&pinctrl_aobus {
&gpio_ao {
gpio-line-names = "UART TX",
"UART RX",
"Blue LED",
@ -179,7 +182,7 @@
"7J1 Header Pin15";
};
&pinctrl_periphs {
&gpio {
gpio-line-names = /* Bank GPIOZ */
"", "", "", "", "", "", "",
"", "", "", "", "", "", "",
@ -235,11 +238,10 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vcc_3v3>;
vqmmc-supply = <&vcc_card>;
@ -254,9 +256,9 @@
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-3_3v;
max-frequency = <50000000>;
non-removable;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;

10
arch/arm/dts/meson-gxl-s905x-p212.dtsi
View File

@ -114,11 +114,14 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
@ -134,11 +137,10 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;

76
arch/arm/dts/meson-gxl.dtsi
View File

@ -36,6 +36,16 @@
phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>;
};
};
crypto: crypto@c883e000 {
compatible = "amlogic,gxl-crypto";
reg = <0x0 0xc883e000 0x0 0x36>;
interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_BLKMV>;
clock-names = "blkmv";
status = "okay";
};
};
};
@ -80,9 +90,6 @@
};
&ethmac {
reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x4>;
clocks = <&clkc CLKID_ETH>,
<&clkc CLKID_FCLK_DIV2>,
<&clkc CLKID_MPLL2>;
@ -326,10 +333,15 @@
};
emmc_pins: emmc {
mux {
mux-0 {
groups = "emmc_nand_d07",
"emmc_cmd",
"emmc_clk";
"emmc_cmd";
function = "emmc";
bias-pull-up;
};
mux-1 {
groups = "emmc_clk";
function = "emmc";
bias-disable;
};
@ -339,7 +351,7 @@
mux {
groups = "emmc_ds";
function = "emmc";
bias-disable;
bias-pull-down;
};
};
@ -381,13 +393,18 @@
};
sdcard_pins: sdcard {
mux {
mux-0 {
groups = "sdcard_d0",
"sdcard_d1",
"sdcard_d2",
"sdcard_d3",
"sdcard_cmd",
"sdcard_clk";
"sdcard_cmd";
function = "sdcard";
bias-pull-up;
};
mux-1 {
groups = "sdcard_clk";
function = "sdcard";
bias-disable;
};
@ -402,13 +419,18 @@
};
sdio_pins: sdio {
mux {
mux-0 {
groups = "sdio_d0",
"sdio_d1",
"sdio_d2",
"sdio_d3",
"sdio_cmd",
"sdio_clk";
"sdio_cmd";
function = "sdio";
bias-pull-up;
};
mux-1 {
groups = "sdio_clk";
function = "sdio";
bias-disable;
};
@ -511,6 +533,15 @@
};
};
i2c_c_dv18_pins: i2c_c_dv18 {
mux {
groups = "i2c_sck_c_dv19",
"i2c_sda_c_dv18";
function = "i2c_c";
bias-disable;
};
};
eth_pins: eth_c {
mux {
groups = "eth_mdio",
@ -697,7 +728,7 @@
#size-cells = <0>;
internal_phy: ethernet-phy@8 {
compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22";
compatible = "ethernet-phy-id0181.4400";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg = <8>;
max-speed = <100>;
@ -787,6 +818,12 @@
resets = <&reset RESET_SD_EMMC_C>;
};
&simplefb_hdmi {
clocks = <&clkc CLKID_HDMI_PCLK>,
<&clkc CLKID_CLK81>,
<&clkc CLKID_GCLK_VENCI_INT0>;
};
&spicc {
clocks = <&clkc CLKID_SPICC>;
clock-names = "core";
@ -827,3 +864,14 @@
compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
power-domains = <&pwrc_vpu>;
};
&vdec {
compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
clocks = <&clkc CLKID_DOS_PARSER>,
<&clkc CLKID_DOS>,
<&clkc CLKID_VDEC_1>,
<&clkc CLKID_VDEC_HEVC>;
clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
resets = <&reset RESET_PARSER>;
reset-names = "esparser";
};

71
arch/arm/dts/meson-gxm-khadas-vim2.dts
View File

@ -18,7 +18,6 @@
aliases {
serial0 = &uart_AO;
serial1 = &uart_A;
serial2 = &uart_AO_B;
};
@ -63,11 +62,9 @@
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
button@0 {
power-button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
@ -132,19 +129,15 @@
map1 {
trip = <&cpu_alert1>;
cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>;
};
map2 {
trip = <&cpu_alert1>;
cooling-device =
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map3 {
trip = <&cpu_alert1>;
cooling-device =
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>,
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
@ -246,11 +239,6 @@
amlogic,tx-delay-ns = <2>;
/* External PHY reset is shared with internal PHY Led signals */
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
/* External PHY is in RGMII */
phy-mode = "rgmii";
@ -261,6 +249,11 @@
external_phy: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
@ -306,7 +299,7 @@
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
linux,rc-map-name = "rc-geekbox";
linux,rc-map-name = "rc-khadas";
};
&pwm_AO_ab {
@ -328,16 +321,20 @@
&sd_emmc_a {
status = "okay";
pinctrl-0 = <&sdio_pins>;
pinctrl-names = "default";
pinctrl-1 = <&sdio_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
#address-cells = <1>;
#size-cells = <0>;
bus-width = <4>;
max-frequency = <100000000>;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
@ -353,15 +350,15 @@
&sd_emmc_b {
status = "okay";
pinctrl-0 = <&sdcard_pins>;
pinctrl-names = "default";
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
max-frequency = <50000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddao_3v3>;
vqmmc-supply = <&vddio_boot>;
@ -371,17 +368,16 @@
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-names = "default";
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vcc_3v3>;
@ -409,8 +405,17 @@
/* This one is connected to the Bluetooth module */
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>;
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;
clock-names = "lpo";
};
};
/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */

7
arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi Normal file
View File

@ -0,0 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-gx-u-boot.dtsi"

62
arch/arm/dts/meson-gxm-s912-libretech-pc.dts Normal file
View File

@ -0,0 +1,62 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019 BayLibre SAS. All rights reserved.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
/dts-v1/;
#include "meson-gxm.dtsi"
#include "meson-gx-libretech-pc.dtsi"
/ {
compatible = "libretech,aml-s912-pc", "amlogic,s912",
"amlogic,meson-gxm";
model = "Libre Computer AML-S912-PC";
typec2_vbus: regulator-typec2_vbus {
compatible = "regulator-fixed";
regulator-name = "TYPEC2_VBUS";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v>;
gpio = <&gpio GPIODV_1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&pinctrl_periphs {
/*
* Make sure the irq pin of the TYPE C controller is not driven
* by the SoC.
*/
fusb302_irq_pins: fusb302_irq {
mux {
groups = "GPIODV_0";
function = "gpio_periphs";
bias-pull-up;
output-disable;
};
};
};
&i2c_C {
fusb302@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
pinctrl-0 = <&fusb302_irq_pins>;
pinctrl-names = "default";
interrupt-parent = <&gpio_intc>;
interrupts = <59 IRQ_TYPE_LEVEL_LOW>;
vbus-supply = <&typec2_vbus>;
status = "okay";
};
};
&usb2_phy2 {
phy-supply = <&typec2_vbus>;
};

39
arch/arm/dts/meson-gxm.dtsi
View File

@ -44,7 +44,7 @@
cpu4: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -53,7 +53,7 @@
cpu5: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x101>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -62,7 +62,7 @@
cpu6: cpu@102 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x102>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -71,7 +71,7 @@
cpu7: cpu@103 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x103>;
enable-method = "psci";
next-level-cache = <&l2>;
@ -91,6 +91,33 @@
reset-names = "phy";
status = "okay";
};
mali: gpu@c0000 {
compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
reg = <0x0 0xc0000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&clkc CLKID_MALI>;
resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
/*
* Mali clocking is provided by two identical clock paths
* MALI_0 and MALI_1 muxed to a single clock by a glitch
* free mux to safely change frequency while running.
*/
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
<0>; /* Do Nothing */
};
};
&clkc_AO {
@ -117,3 +144,7 @@
&dwc3 {
phys = <&usb3_phy>, <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
};
&vdec {
compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
};

7
arch/arm/dts/meson-khadas-vim3.dtsi
View File

@ -246,6 +246,10 @@
linux,rc-map-name = "rc-khadas";
};
&pcie {
reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
@ -274,6 +278,9 @@
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vsys_3v3>;

236
arch/arm/dts/meson-sm1-sei610.dts
View File

@ -9,6 +9,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/meson-g12a-gpio.h>
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "seirobotics,sei610", "amlogic,sm1";
@ -19,6 +20,22 @@
ethernet0 = &ethmac;
};
mono_dac: audio-codec-0 {
compatible = "maxim,max98357a";
#sound-dai-cells = <0>;
sound-name-prefix = "U16";
sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
};
dmics: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "dmic-codec";
num-channels = <2>;
wakeup-delay-ms = <50>;
status = "okay";
sound-name-prefix = "MIC";
};
chosen {
stdout-path = "serial0:115200n8";
};
@ -29,25 +46,47 @@
};
gpio-keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
compatible = "gpio-keys";
key1 {
label = "A";
linux,code = <BTN_0>;
gpios = <&gpio GPIOH_6 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <34 IRQ_TYPE_EDGE_BOTH>;
};
key2 {
label = "B";
linux,code = <BTN_1>;
gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <35 IRQ_TYPE_EDGE_BOTH>;
};
key3 {
label = "C";
linux,code = <BTN_2>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <2 IRQ_TYPE_EDGE_BOTH>;
};
mic_mute {
label = "MicMute";
linux,code = <SW_MUTE_DEVICE>;
linux,input-type = <EV_SW>;
gpios = <&gpio_ao GPIOE_2 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <99 IRQ_TYPE_EDGE_BOTH>;
};
power_key {
label = "PowerKey";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
};
};
@ -179,6 +218,120 @@
clock-names = "ext_clock";
};
sound {
compatible = "amlogic,axg-sound-card";
model = "SM1-SEI610";
audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
<&tdmin_a>, <&tdmin_b>;
audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
"TDMOUT_A IN 1", "FRDDR_B OUT 0",
"TDMOUT_A IN 2", "FRDDR_C OUT 0",
"TDM_A Playback", "TDMOUT_A OUT",
"TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
"TDMOUT_B IN 2", "FRDDR_C OUT 1",
"TDM_B Playback", "TDMOUT_B OUT",
"TODDR_A IN 4", "PDM Capture",
"TODDR_B IN 4", "PDM Capture",
"TODDR_C IN 4", "PDM Capture",
"TDMIN_A IN 0", "TDM_A Capture",
"TDMIN_A IN 3", "TDM_A Loopback",
"TDMIN_B IN 0", "TDM_A Capture",
"TDMIN_B IN 3", "TDM_A Loopback",
"TDMIN_A IN 1", "TDM_B Capture",
"TDMIN_A IN 4", "TDM_B Loopback",
"TDMIN_B IN 1", "TDM_B Capture",
"TDMIN_B IN 4", "TDM_B Loopback",
"TODDR_A IN 0", "TDMIN_A OUT",
"TODDR_B IN 0", "TDMIN_A OUT",
"TODDR_C IN 0", "TDMIN_A OUT",
"TODDR_A IN 1", "TDMIN_B OUT",
"TODDR_B IN 1", "TDMIN_B OUT",
"TODDR_C IN 1", "TDMIN_B OUT";
assigned-clocks = <&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>;
assigned-clock-parents = <0>, <0>, <0>;
assigned-clock-rates = <294912000>,
<270950400>,
<393216000>;
status = "okay";
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link-5 {
sound-dai = <&toddr_c>;
};
/* internal speaker interface */
dai-link-6 {
sound-dai = <&tdmif_a>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
mclk-fs = <256>;
codec-0 {
sound-dai = <&mono_dac>;
};
codec-1 {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
};
};
/* 8ch hdmi interface */
dai-link-7 {
sound-dai = <&tdmif_b>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-0 = <1 1>;
dai-tdm-slot-tx-mask-1 = <1 1>;
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
/* internal digital mics */
dai-link-8 {
sound-dai = <&pdm>;
codec {
sound-dai = <&dmics>;
};
};
/* hdmi glue */
dai-link-9 {
sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
codec {
sound-dai = <&hdmi_tx>;
};
};
};
wifi32k: wifi32k {
compatible = "pwm-clock";
#clock-cells = <0>;
@ -187,6 +340,10 @@
};
};
&arb {
status = "okay";
};
&cec_AO {
pinctrl-0 = <&cec_ao_a_h_pins>;
pinctrl-names = "default";
@ -201,6 +358,10 @@
hdmi-phandle = <&hdmi_tx>;
};
&clkc_audio {
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
@ -235,6 +396,18 @@
phy-mode = "rmii";
};
&frddr_a {
status = "okay";
};
&frddr_b {
status = "okay";
};
&frddr_c {
status = "okay";
};
&hdmi_tx {
status = "okay";
pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
@ -259,6 +432,12 @@
pinctrl-names = "default";
};
&pdm {
pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_dclk_z_pins>;
pinctrl-names = "default";
status = "okay";
};
&pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
@ -305,6 +484,9 @@
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
@ -353,6 +535,54 @@
vqmmc-supply = <&emmc_1v8>;
};
&tdmif_a {
pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
pinctrl-names = "default";
status = "okay";
assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
<&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
assigned-clock-rates = <0>, <0>;
};
&tdmif_b {
status = "okay";
};
&tdmin_a {
status = "okay";
};
&tdmin_b {
status = "okay";
};
&tdmout_a {
status = "okay";
};
&tdmout_b {
status = "okay";
};
&toddr_a {
status = "okay";
};
&toddr_b {
status = "okay";
};
&toddr_c {
status = "okay";
};
&tohdmitx {
status = "okay";
};
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
@ -361,6 +591,8 @@
bluetooth {
compatible = "brcm,bcm43438-bt";
interrupt-parent = <&gpio_intc>;
interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
clocks = <&wifi32k>;

356
arch/arm/dts/meson-sm1.dtsi
View File

@ -5,11 +5,47 @@
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/clock/axg-audio-clkc.h>
#include <dt-bindings/power/meson-sm1-power.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
/ {
compatible = "amlogic,sm1";
tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_A";
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_B";
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_C";
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
@ -117,6 +153,305 @@
};
};
&apb {
audio: bus@60000 {
compatible = "simple-bus";
reg = <0x0 0x60000 0x0 0x1000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
clkc_audio: clock-controller@0 {
status = "disabled";
compatible = "amlogic,sm1-audio-clkc";
reg = <0x0 0x0 0x0 0xb4>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clkc CLKID_AUDIO>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL3>,
<&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_FCLK_DIV3>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV5>;
clock-names = "pclk",
"mst_in0",
"mst_in1",
"mst_in2",
"mst_in3",
"mst_in4",
"mst_in5",
"mst_in6",
"mst_in7";
resets = <&reset RESET_AUDIO>;
};
toddr_a: audio-controller@100 {
compatible = "amlogic,sm1-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x100 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_A";
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
resets = <&arb AXG_ARB_TODDR_A>,
<&clkc_audio AUD_RESET_TODDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <8192>;
status = "disabled";
};
toddr_b: audio-controller@140 {
compatible = "amlogic,sm1-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x140 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_B";
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
resets = <&arb AXG_ARB_TODDR_B>,
<&clkc_audio AUD_RESET_TODDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
toddr_c: audio-controller@180 {
compatible = "amlogic,sm1-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x180 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_C";
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
resets = <&arb AXG_ARB_TODDR_C>,
<&clkc_audio AUD_RESET_TODDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_a: audio-controller@1c0 {
compatible = "amlogic,sm1-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x1c0 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_A";
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
resets = <&arb AXG_ARB_FRDDR_A>,
<&clkc_audio AUD_RESET_FRDDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
frddr_b: audio-controller@200 {
compatible = "amlogic,sm1-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x200 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_B";
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
resets = <&arb AXG_ARB_FRDDR_B>,
<&clkc_audio AUD_RESET_FRDDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_c: audio-controller@240 {
compatible = "amlogic,sm1-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x240 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_C";
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
resets = <&arb AXG_ARB_FRDDR_C>,
<&clkc_audio AUD_RESET_FRDDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
arb: reset-controller@280 {
status = "disabled";
compatible = "amlogic,meson-sm1-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};
tdmin_a: audio-controller@300 {
compatible = "amlogic,sm1-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x300 0x0 0x40>;
sound-name-prefix = "TDMIN_A";
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_b: audio-controller@340 {
compatible = "amlogic,sm1-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x340 0x0 0x40>;
sound-name-prefix = "TDMIN_B";
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_c: audio-controller@380 {
compatible = "amlogic,sm1-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x380 0x0 0x40>;
sound-name-prefix = "TDMIN_C";
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_lb: audio-controller@3c0 {
compatible = "amlogic,sm1-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x3c0 0x0 0x40>;
sound-name-prefix = "TDMIN_LB";
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,sm1-tdmout";
reg = <0x0 0x500 0x0 0x40>;
sound-name-prefix = "TDMOUT_A";
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_b: audio-controller@540 {
compatible = "amlogic,sm1-tdmout";
reg = <0x0 0x540 0x0 0x40>;
sound-name-prefix = "TDMOUT_B";
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_c: audio-controller@580 {
compatible = "amlogic,sm1-tdmout";
reg = <0x0 0x580 0x0 0x40>;
sound-name-prefix = "TDMOUT_C";
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tohdmitx: audio-controller@744 {
compatible = "amlogic,sm1-tohdmitx",
"amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOHDMITX";
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
status = "disabled";
};
toddr_d: audio-controller@840 {
compatible = "amlogic,sm1-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x840 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_D";
interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
resets = <&arb AXG_ARB_TODDR_D>,
<&clkc_audio AUD_RESET_TODDR_D>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_d: audio-controller@880 {
compatible = "amlogic,sm1-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x880 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_D";
interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
resets = <&arb AXG_ARB_FRDDR_D>,
<&clkc_audio AUD_RESET_FRDDR_D>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
};
pdm: audio-controller@61000 {
compatible = "amlogic,sm1-pdm",
"amlogic,axg-pdm";
reg = <0x0 0x61000 0x0 0x34>;
#sound-dai-cells = <0>;
sound-name-prefix = "PDM";
clocks = <&clkc_audio AUD_CLKID_PDM>,
<&clkc_audio AUD_CLKID_PDM_DCLK>,
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
clock-names = "pclk", "dclk", "sysclk";
status = "disabled";
};
};
&cecb_AO {
compatible = "amlogic,meson-sm1-ao-cec";
};
@ -134,10 +469,31 @@
power-domains = <&pwrc PWRC_SM1_ETH_ID>;
};
&gpio_intc {
compatible = "amlogic,meson-sm1-gpio-intc",
"amlogic,meson-gpio-intc";
};
&pcie {
power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
};
&pwrc {
compatible = "amlogic,meson-sm1-pwrc";
};
&simplefb_cvbs {
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
};
&simplefb_hdmi {
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
};
&vdec {
compatible = "amlogic,sm1-vdec";
};
&vpu {
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
};

2
board/amlogic/q200/MAINTAINERS
View File

@ -5,3 +5,5 @@ L: u-boot-amlogic@groups.io
F: board/amlogic/q200/
F: include/configs/q200.h
F: configs/khadas-vim2_defconfig
F: configs/libretech-s905d-pc_defconfig
F: configs/libretech-s912-pc_defconfig

73
configs/libretech-s905d-pc_defconfig Normal file
View File

@ -0,0 +1,73 @@
CONFIG_ARM=y
CONFIG_SYS_BOARD="q200"
CONFIG_ARCH_MESON=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_MESON_GXL=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xc81004c0
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_IDENT_STRING=" libretech-s905d-pc"
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
CONFIG_CMD_ADC=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SARADC_MESON=y
CONFIG_DM_GPIO=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
CONFIG_POWER_DOMAIN=y
CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_MESON=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
CONFIG_USB_DWC3=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_MESON=y
CONFIG_VIDEO_DT_SIMPLEFB=y
CONFIG_OF_LIBFDT_OVERLAY=y

73
configs/libretech-s912-pc_defconfig Normal file
View File

@ -0,0 +1,73 @@
CONFIG_ARM=y
CONFIG_SYS_BOARD="q200"
CONFIG_ARCH_MESON=y
CONFIG_SYS_TEXT_BASE=0x01000000
CONFIG_MESON_GXM=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xc81004c0
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_IDENT_STRING=" libretech-s912-pc"
CONFIG_DEBUG_UART=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_IMI is not set
CONFIG_CMD_ADC=y
CONFIG_CMD_GPIO=y
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SARADC_MESON=y
CONFIG_DM_GPIO=y
CONFIG_DM_KEYBOARD=y
CONFIG_DM_MMC=y
CONFIG_MMC_MESON_GX=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY=y
CONFIG_MESON_GXL_USB_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXL=y
CONFIG_POWER_DOMAIN=y
CONFIG_MESON_GX_VPU_POWER_DOMAIN=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_RESET=y
CONFIG_DEBUG_UART_MESON=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
CONFIG_USB_DWC3=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_VIDEO_MESON=y
CONFIG_VIDEO_DT_SIMPLEFB=y
CONFIG_OF_LIBFDT_OVERLAY=y

7
drivers/clk/meson/axg.c
View File

@ -291,6 +291,13 @@ static int meson_clk_probe(struct udevice *dev)
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
/*
* Depending on the boot src, the state of the MMC clock might
* be different. Reset it to make sure we won't get stuck
*/
regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0);
regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0);
debug("meson-clk-axg: probed\n");
return 0;

8
drivers/clk/meson/g12a.c
View File

@ -804,6 +804,7 @@ static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id)
break;
case CLKID_PCIE_PLL:
rate = meson_pcie_pll_get_rate(clk);
break;
case CLKID_VPU_0:
rate = meson_div_get_rate(clk, CLKID_VPU_0_DIV);
break;
@ -977,6 +978,13 @@ static int meson_clk_probe(struct udevice *dev)
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
/*
* Depending on the boot src, the state of the MMC clock might
* be different. Reset it to make sure we won't get stuck
*/
regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0);
regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0);
debug("meson-clk-g12a: probed\n");
return 0;

7
drivers/clk/meson/gxbb.c
View File

@ -887,6 +887,13 @@ static int meson_clk_probe(struct udevice *dev)
if (IS_ERR(priv->map))
return PTR_ERR(priv->map);
/*
* Depending on the boot src, the state of the MMC clock might
* be different. Reset it to make sure we won't get stuck
*/
regmap_write(priv->map, HHI_NAND_CLK_CNTL, 0);
regmap_write(priv->map, HHI_SD_EMMC_CLK_CNTL, 0);
debug("meson-clk: probed\n");
return 0;

14
drivers/mmc/meson_gx_mmc.c
View File

@ -4,6 +4,7 @@
*/
#include <common.h>
#include <clk.h>
#include <cpu_func.h>
#include <dm.h>
#include <fdtdec.h>
@ -241,12 +242,23 @@ static int meson_mmc_probe(struct udevice *dev)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = &pdata->mmc;
struct mmc_config *cfg = &pdata->cfg;
struct clk_bulk clocks;
uint32_t val;
int ret;
#ifdef CONFIG_PWRSEQ
struct udevice *pwr_dev;
int ret;
#endif
/* Enable the clocks feeding the MMC controller */
ret = clk_get_bulk(dev, &clocks);
if (ret)
return ret;
ret = clk_enable_bulk(&clocks);
if (ret)
return ret;
cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 |
MMC_VDD_31_32 | MMC_VDD_165_195;
cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |

10
include/dt-bindings/clock/axg-audio-clkc.h
View File

@ -80,5 +80,15 @@
#define AUD_CLKID_TDM_SCLK_PAD0 160
#define AUD_CLKID_TDM_SCLK_PAD1 161
#define AUD_CLKID_TDM_SCLK_PAD2 162
#define AUD_CLKID_TOP 163
#define AUD_CLKID_TORAM 164
#define AUD_CLKID_EQDRC 165
#define AUD_CLKID_RESAMPLE_B 166
#define AUD_CLKID_TOVAD 167
#define AUD_CLKID_LOCKER 168
#define AUD_CLKID_SPDIFIN_LB 169
#define AUD_CLKID_FRDDR_D 170
#define AUD_CLKID_TODDR_D 171
#define AUD_CLKID_LOOPBACK_B 172
#endif /* __AXG_AUDIO_CLKC_BINDINGS_H */

7
include/dt-bindings/clock/gxbb-aoclkc.h
View File

@ -63,5 +63,12 @@
#define CLKID_AO_UART2 4
#define CLKID_AO_IR_BLASTER 5
#define CLKID_AO_CEC_32K 6
#define CLKID_AO_CTS_OSCIN 7
#define CLKID_AO_32K_PRE 8
#define CLKID_AO_32K_DIV 9
#define CLKID_AO_32K_SEL 10
#define CLKID_AO_32K 11
#define CLKID_AO_CTS_RTC_OSCIN 12
#define CLKID_AO_CLK81 13
#endif

21
include/dt-bindings/clock/gxbb-clkc.h
View File

@ -125,5 +125,26 @@
#define CLKID_VAPB_1 138
#define CLKID_VAPB_SEL 139
#define CLKID_VAPB 140
#define CLKID_VDEC_1 153
#define CLKID_VDEC_HEVC 156
#define CLKID_GEN_CLK 159
#define CLKID_VID_PLL 166
#define CLKID_VCLK 175
#define CLKID_VCLK2 176
#define CLKID_VCLK_DIV1 185
#define CLKID_VCLK_DIV2 186
#define CLKID_VCLK_DIV4 187
#define CLKID_VCLK_DIV6 188
#define CLKID_VCLK_DIV12 189
#define CLKID_VCLK2_DIV1 190
#define CLKID_VCLK2_DIV2 191
#define CLKID_VCLK2_DIV4 192
#define CLKID_VCLK2_DIV6 193
#define CLKID_VCLK2_DIV12 194
#define CLKID_CTS_ENCI 199
#define CLKID_CTS_ENCP 200
#define CLKID_CTS_VDAC 201
#define CLKID_HDMI_TX 202
#define CLKID_HDMI 205
#endif /* __GXBB_CLKC_H */

8
include/dt-bindings/gpio/meson-gxbb-gpio.h
View File

@ -1,15 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIO definitions for Amlogic Meson GXBB SoCs
*
* Copyright (C) 2016 Endless Mobile, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H

8
include/dt-bindings/gpio/meson-gxl-gpio.h
View File

@ -1,15 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* GPIO definitions for Amlogic Meson GXL SoCs
*
* Copyright (C) 2016 Endless Mobile, Inc.
* Author: Carlo Caione <carlo@endlessm.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _DT_BINDINGS_MESON_GXL_GPIO_H

75
include/dt-bindings/leds/common.h Normal file
View File

@ -0,0 +1,75 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides macros for the common LEDs device tree bindings.
*
* Copyright (C) 2015, Samsung Electronics Co., Ltd.
* Author: Jacek Anaszewski <j.anaszewski@samsung.com>
*
* Copyright (C) 2019 Jacek Anaszewski <jacek.anaszewski@gmail.com>
*/
#ifndef __DT_BINDINGS_LEDS_H
#define __DT_BINDINGS_LEDS_H
/* External trigger type */
#define LEDS_TRIG_TYPE_EDGE 0
#define LEDS_TRIG_TYPE_LEVEL 1
/* Boost modes */
#define LEDS_BOOST_OFF 0
#define LEDS_BOOST_ADAPTIVE 1
#define LEDS_BOOST_FIXED 2
/* Standard LED colors */
#define LED_COLOR_ID_WHITE 0
#define LED_COLOR_ID_RED 1
#define LED_COLOR_ID_GREEN 2
#define LED_COLOR_ID_BLUE 3
#define LED_COLOR_ID_AMBER 4
#define LED_COLOR_ID_VIOLET 5
#define LED_COLOR_ID_YELLOW 6
#define LED_COLOR_ID_IR 7
#define LED_COLOR_ID_MAX 8
/* Standard LED functions */
#define LED_FUNCTION_ACTIVITY "activity"
#define LED_FUNCTION_ALARM "alarm"
#define LED_FUNCTION_BACKLIGHT "backlight"
#define LED_FUNCTION_BLUETOOTH "bluetooth"
#define LED_FUNCTION_BOOT "boot"
#define LED_FUNCTION_CPU "cpu"
#define LED_FUNCTION_CAPSLOCK "capslock"
#define LED_FUNCTION_CHARGING "charging"
#define LED_FUNCTION_DEBUG "debug"
#define LED_FUNCTION_DISK "disk"
#define LED_FUNCTION_DISK_ACTIVITY "disk-activity"
#define LED_FUNCTION_DISK_ERR "disk-err"
#define LED_FUNCTION_DISK_READ "disk-read"
#define LED_FUNCTION_DISK_WRITE "disk-write"
#define LED_FUNCTION_FAULT "fault"
#define LED_FUNCTION_FLASH "flash"
#define LED_FUNCTION_HEARTBEAT "heartbeat"
#define LED_FUNCTION_INDICATOR "indicator"
#define LED_FUNCTION_KBD_BACKLIGHT "kbd_backlight"
#define LED_FUNCTION_LAN "lan"
#define LED_FUNCTION_MAIL "mail"
#define LED_FUNCTION_MTD "mtd"
#define LED_FUNCTION_MICMUTE "micmute"
#define LED_FUNCTION_MUTE "mute"
#define LED_FUNCTION_NUMLOCK "numlock"
#define LED_FUNCTION_PANIC "panic"
#define LED_FUNCTION_PROGRAMMING "programming"
#define LED_FUNCTION_POWER "power"
#define LED_FUNCTION_RX "rx"
#define LED_FUNCTION_SD "sd"
#define LED_FUNCTION_SCROLLLOCK "scrolllock"
#define LED_FUNCTION_STANDBY "standby"
#define LED_FUNCTION_STATUS "status"
#define LED_FUNCTION_TORCH "torch"
#define LED_FUNCTION_TX "tx"
#define LED_FUNCTION_USB "usb"
#define LED_FUNCTION_WAN "wan"
#define LED_FUNCTION_WLAN "wlan"
#define LED_FUNCTION_WPS "wps"
#endif /* __DT_BINDINGS_LEDS_H */

2
include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
View File

@ -13,5 +13,7 @@
#define AXG_ARB_FRDDR_A 3
#define AXG_ARB_FRDDR_B 4
#define AXG_ARB_FRDDR_C 5
#define AXG_ARB_TODDR_D 6
#define AXG_ARB_FRDDR_D 7
#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */

3
include/dt-bindings/reset/amlogic,meson-axg-reset.h
View File

@ -1,12 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
/*
*
* Copyright (c) 2016 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* Copyright (c) 2017 Amlogic, inc.
* Author: Yixun Lan <yixun.lan@amlogic.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR BSD)
*/
#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H

15
include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
View File

@ -35,4 +35,19 @@
#define AUD_RESET_TOHDMITX 24
#define AUD_RESET_CLKTREE 25
/* SM1 added resets */
#define AUD_RESET_RESAMPLE_B 26
#define AUD_RESET_TOVAD 27
#define AUD_RESET_LOCKER 28
#define AUD_RESET_SPDIFIN_LB 29
#define AUD_RESET_FRATV 30
#define AUD_RESET_FRHDMIRX 31
#define AUD_RESET_FRDDR_D 32
#define AUD_RESET_TODDR_D 33
#define AUD_RESET_LOOPBACK_B 34
#define AUD_RESET_EARCTX 35
#define AUD_RESET_EARCRX 36
#define AUD_RESET_FRDDR_E 37
#define AUD_RESET_TODDR_E 38
#endif

51
include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
View File

@ -1,56 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright (c) 2016 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
* The full GNU General Public License is included in this distribution
* in the file called COPYING.
*
* BSD LICENSE
*
* Copyright (c) 2016 BayLibre, SAS.
* Author: Neil Armstrong <narmstrong@baylibre.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H