mirror of
https://github.com/brain-hackers/u-boot-brain
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ARM: remove broken "at91rm9200dk" board
Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Wolfgang Denk
Albert ARIBAUD
parent
b1a2bd4bb3
commit
1c85752258
@ -1,56 +0,0 @@
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#
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# (C) Copyright 2003-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS-y += $(BOARD).o
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COBJS-y += flash.o
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COBJS-y += led.o
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ifdef CONFIG_HAS_DATAFLASH
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COBJS-$(CONFIG_DATAFLASH_MMC_SELECT) += mux.o
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COBJS-y += partition.o
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endif
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,167 +0,0 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <exports.h>
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#include <netdev.h>
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#include <asm/arch/AT91RM9200.h>
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#include <asm/io.h>
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#if defined(CONFIG_DRIVER_ETHER)
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#include <at91rm9200_net.h>
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#include <dm9161.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* Enable Ctrlc */
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console_init_f ();
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/* Correct IRDA resistor problem */
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/* Set PA23_TXD in Output */
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((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
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/* memory and cpu-speed are setup before relocation */
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/* so we do _nothing_ here */
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/* arch number of AT91RM9200DK-Board */
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gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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void board_reset (void)
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{
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AT91PS_PIO pio = AT91C_BASE_PIOA;
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/* Clear PA19 to trigger the hard reset */
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writel(0x00080000, pio->PIO_CODR);
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writel(0x00080000, pio->PIO_OER);
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writel(0x00080000, pio->PIO_PER);
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_DRIVER_ETHER
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#if defined(CONFIG_CMD_NET)
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/*
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* Name:
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* at91rm9200_GetPhyInterface
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* Description:
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* Initialise the interface functions to the PHY
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* Arguments:
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* None
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* Return value:
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* None
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*/
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
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{
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p_phyops->Init = dm9161_InitPhy;
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p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
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p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
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p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
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}
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#endif
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#endif /* CONFIG_DRIVER_ETHER */
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#ifdef CONFIG_DRIVER_AT91EMAC
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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rc = at91emac_register(bis, 0);
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return rc;
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}
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#endif
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/*
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* Disk On Chip (NAND) Millenium initialization.
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* The NAND lives in the CS2* space
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*/
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#if defined(CONFIG_CMD_NAND)
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extern ulong nand_probe (ulong physadr);
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#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
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void nand_init (void)
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{
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/* Setup Smart Media, fitst enable the address range of CS3 */
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*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
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/* set the bus interface characteristics based on
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tDS Data Set up Time 30 - ns
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tDH Data Hold Time 20 - ns
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tALS ALE Set up Time 20 - ns
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16ns at 60 MHz ~= 3 */
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/*memory mapping structures */
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#define SM_ID_RWH (5 << 28)
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#define SM_RWH (1 << 28)
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#define SM_RWS (0 << 24)
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#define SM_TDF (1 << 8)
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#define SM_NWS (3)
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AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
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AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
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SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
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/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
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*AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
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AT91C_PC3_BFBAA_SMWE;
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*AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
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AT91C_PC3_BFBAA_SMWE;
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/* Configure PC2 as input (signal READY of the SmartMedia) */
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*AT91C_PIOC_PER = AT91C_PC2_BFAVD; /* enable direct output enable */
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*AT91C_PIOC_ODR = AT91C_PC2_BFAVD; /* disable output */
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/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
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*AT91C_PIOB_PER = AT91C_PIO_PB1; /* enable direct output enable */
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*AT91C_PIOB_ODR = AT91C_PIO_PB1; /* disable output */
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/* PIOB and PIOC clock enabling */
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*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
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*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
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if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
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printf (" No SmartMedia card inserted\n");
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#ifdef DEBUG
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printf (" SmartMedia card inserted\n");
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printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
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#endif
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printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
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}
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#endif
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@ -1 +0,0 @@
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CONFIG_SYS_TEXT_BASE = 0x21f00000
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@ -1,504 +0,0 @@
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/*
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* (C) Copyright 2002
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* Lineo, Inc. <www.lineo.com>
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* Bernhard Kuhn <bkuhn@lineo.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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ulong myflush(void);
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/* Flash Organization Structure */
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typedef struct OrgDef
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{
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unsigned int sector_number;
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unsigned int sector_size;
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} OrgDef;
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/* Flash Organizations */
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OrgDef OrgAT49BV16x4[] =
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{
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{ 8, 8*1024 }, /* 8 * 8 kBytes sectors */
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{ 2, 32*1024 }, /* 2 * 32 kBytes sectors */
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{ 30, 64*1024 }, /* 30 * 64 kBytes sectors */
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};
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OrgDef OrgAT49BV16x4A[] =
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{
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{ 8, 8*1024 }, /* 8 * 8 kBytes sectors */
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{ 31, 64*1024 }, /* 31 * 64 kBytes sectors */
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};
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OrgDef OrgAT49BV6416[] =
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{
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{ 8, 8*1024 }, /* 8 * 8 kBytes sectors */
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{ 127, 64*1024 }, /* 127 * 64 kBytes sectors */
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};
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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/* AT49BV1614A Codes */
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#define FLASH_CODE1 0xAA
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#define FLASH_CODE2 0x55
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#define ID_IN_CODE 0x90
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#define ID_OUT_CODE 0xF0
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#define CMD_READ_ARRAY 0x00F0
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#define CMD_UNLOCK1 0x00AA
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#define CMD_UNLOCK2 0x0055
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#define CMD_ERASE_SETUP 0x0080
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#define CMD_ERASE_CONFIRM 0x0030
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#define CMD_PROGRAM 0x00A0
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#define CMD_UNLOCK_BYPASS 0x0020
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#define CMD_SECTOR_UNLOCK 0x0070
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#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00005555<<1)))
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#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00002AAA<<1)))
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#define BIT_ERASE_DONE 0x0080
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#define BIT_RDY_MASK 0x0080
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#define BIT_PROGRAM_ERROR 0x0020
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#define BIT_TIMEOUT 0x80000000 /* our flag */
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#define READY 1
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#define ERR 2
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#define TMO 4
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/*-----------------------------------------------------------------------
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*/
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void flash_identification (flash_info_t * info)
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{
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volatile u16 manuf_code, device_code, add_device_code;
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MEM_FLASH_ADDR1 = FLASH_CODE1;
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MEM_FLASH_ADDR2 = FLASH_CODE2;
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MEM_FLASH_ADDR1 = ID_IN_CODE;
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manuf_code = *(volatile u16 *) CONFIG_SYS_FLASH_BASE;
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device_code = *(volatile u16 *) (CONFIG_SYS_FLASH_BASE + 2);
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add_device_code = *(volatile u16 *) (CONFIG_SYS_FLASH_BASE + (3 << 1));
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MEM_FLASH_ADDR1 = FLASH_CODE1;
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MEM_FLASH_ADDR2 = FLASH_CODE2;
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MEM_FLASH_ADDR1 = ID_OUT_CODE;
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/* Vendor type */
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info->flash_id = ATM_MANUFACT & FLASH_VENDMASK;
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printf ("Atmel: ");
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if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV1614 & FLASH_TYPEMASK)) {
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if ((add_device_code & FLASH_TYPEMASK) ==
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(ATM_ID_BV1614A & FLASH_TYPEMASK)) {
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info->flash_id |= ATM_ID_BV1614A & FLASH_TYPEMASK;
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printf ("AT49BV1614A (16Mbit)\n");
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} else { /* AT49BV1614 Flash */
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info->flash_id |= ATM_ID_BV1614 & FLASH_TYPEMASK;
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printf ("AT49BV1614 (16Mbit)\n");
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}
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} else if ((device_code & FLASH_TYPEMASK) == (ATM_ID_BV6416 & FLASH_TYPEMASK)) {
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info->flash_id |= ATM_ID_BV6416 & FLASH_TYPEMASK;
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printf ("AT49BV6416 (64Mbit)\n");
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}
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}
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ushort flash_number_sector(OrgDef *pOrgDef, unsigned int nb_blocks)
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{
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int i, nb_sectors = 0;
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for (i=0; i<nb_blocks; i++){
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nb_sectors += pOrgDef[i].sector_number;
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}
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return nb_sectors;
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}
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void flash_unlock_sector(flash_info_t * info, unsigned int sector)
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{
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volatile u16 *addr = (volatile u16 *) (info->start[sector]);
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MEM_FLASH_ADDR1 = CMD_UNLOCK1;
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*addr = CMD_SECTOR_UNLOCK;
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}
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ulong flash_init (void)
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{
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int i, j, k;
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unsigned int flash_nb_blocks, sector;
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unsigned int start_address;
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OrgDef *pOrgDef;
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ulong size = 0;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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ulong flashbase = 0;
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flash_identification (&flash_info[i]);
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if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
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(ATM_ID_BV1614 & FLASH_TYPEMASK)) {
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pOrgDef = OrgAT49BV16x4;
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flash_nb_blocks = sizeof (OrgAT49BV16x4) / sizeof (OrgDef);
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} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
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(ATM_ID_BV1614A & FLASH_TYPEMASK)){ /* AT49BV1614A Flash */
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pOrgDef = OrgAT49BV16x4A;
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flash_nb_blocks = sizeof (OrgAT49BV16x4A) / sizeof (OrgDef);
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} else if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
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(ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
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pOrgDef = OrgAT49BV6416;
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flash_nb_blocks = sizeof (OrgAT49BV6416) / sizeof (OrgDef);
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} else {
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flash_nb_blocks = 0;
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pOrgDef = OrgAT49BV16x4;
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}
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flash_info[i].sector_count = flash_number_sector(pOrgDef, flash_nb_blocks);
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memset (flash_info[i].protect, 0, flash_info[i].sector_count);
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if (i == 0)
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flashbase = PHYS_FLASH_1;
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else
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panic ("configured too many flash banks!\n");
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sector = 0;
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start_address = flashbase;
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flash_info[i].size = 0;
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for (j = 0; j < flash_nb_blocks; j++) {
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for (k = 0; k < pOrgDef[j].sector_number; k++) {
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flash_info[i].start[sector++] = start_address;
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start_address += pOrgDef[j].sector_size;
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flash_info[i].size += pOrgDef[j].sector_size;
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}
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}
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size += flash_info[i].size;
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if ((flash_info[i].flash_id & FLASH_TYPEMASK) ==
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(ATM_ID_BV6416 & FLASH_TYPEMASK)){ /* AT49BV6416 Flash */
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/* Unlock all sectors at reset */
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for (j=0; j<flash_info[i].sector_count; j++){
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flash_unlock_sector(&flash_info[i], j);
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}
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}
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}
|
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|
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/* Protect binary boot image */
|
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_BASE,
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CONFIG_SYS_FLASH_BASE + CONFIG_SYS_BOOT_SIZE - 1, &flash_info[0]);
|
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|
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/* Protect environment variables */
|
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flash_protect (FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
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|
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/* Protect U-Boot gzipped image */
|
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flash_protect (FLAG_PROTECT_SET,
|
||||
CONFIG_SYS_U_BOOT_BASE,
|
||||
CONFIG_SYS_U_BOOT_BASE + CONFIG_SYS_U_BOOT_SIZE - 1, &flash_info[0]);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
void flash_print_info (flash_info_t * info)
|
||||
{
|
||||
int i;
|
||||
|
||||
switch (info->flash_id & FLASH_VENDMASK) {
|
||||
case (ATM_MANUFACT & FLASH_VENDMASK):
|
||||
printf ("Atmel: ");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Vendor ");
|
||||
break;
|
||||
}
|
||||
|
||||
switch (info->flash_id & FLASH_TYPEMASK) {
|
||||
case (ATM_ID_BV1614 & FLASH_TYPEMASK):
|
||||
printf ("AT49BV1614 (16Mbit)\n");
|
||||
break;
|
||||
case (ATM_ID_BV1614A & FLASH_TYPEMASK):
|
||||
printf ("AT49BV1614A (16Mbit)\n");
|
||||
break;
|
||||
case (ATM_ID_BV6416 & FLASH_TYPEMASK):
|
||||
printf ("AT49BV6416 (64Mbit)\n");
|
||||
break;
|
||||
default:
|
||||
printf ("Unknown Chip Type\n");
|
||||
return;
|
||||
}
|
||||
|
||||
printf (" Size: %ld MB in %d Sectors\n",
|
||||
info->size >> 20, info->sector_count);
|
||||
|
||||
printf (" Sector Start Addresses:");
|
||||
for (i = 0; i < info->sector_count; i++) {
|
||||
if ((i % 5) == 0) {
|
||||
printf ("\n ");
|
||||
}
|
||||
printf (" %08lX%s", info->start[i],
|
||||
info->protect[i] ? " (RO)" : " ");
|
||||
}
|
||||
printf ("\n");
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
int flash_erase (flash_info_t * info, int s_first, int s_last)
|
||||
{
|
||||
ulong result;
|
||||
int iflag, cflag, prot, sect;
|
||||
int rc = ERR_OK;
|
||||
int chip1;
|
||||
ulong start;
|
||||
|
||||
/* first look for protection bits */
|
||||
|
||||
if (info->flash_id == FLASH_UNKNOWN)
|
||||
return ERR_UNKNOWN_FLASH_TYPE;
|
||||
|
||||
if ((s_first < 0) || (s_first > s_last)) {
|
||||
return ERR_INVAL;
|
||||
}
|
||||
|
||||
if ((info->flash_id & FLASH_VENDMASK) !=
|
||||
(ATM_MANUFACT & FLASH_VENDMASK)) {
|
||||
return ERR_UNKNOWN_FLASH_VENDOR;
|
||||
}
|
||||
|
||||
prot = 0;
|
||||
for (sect = s_first; sect <= s_last; ++sect) {
|
||||
if (info->protect[sect]) {
|
||||
prot++;
|
||||
}
|
||||
}
|
||||
if (prot)
|
||||
return ERR_PROTECTED;
|
||||
|
||||
/*
|
||||
* Disable interrupts which might cause a timeout
|
||||
* here. Remember that our exception vectors are
|
||||
* at address 0 in the flash, and we don't want a
|
||||
* (ticker) exception to happen while the flash
|
||||
* chip is in programming mode.
|
||||
*/
|
||||
cflag = icache_status ();
|
||||
icache_disable ();
|
||||
iflag = disable_interrupts ();
|
||||
|
||||
/* Start erase on unprotected sectors */
|
||||
for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
|
||||
printf ("Erasing sector %2d ... ", sect);
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
start = get_timer(0);
|
||||
|
||||
if (info->protect[sect] == 0) { /* not protected */
|
||||
volatile u16 *addr = (volatile u16 *) (info->start[sect]);
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
|
||||
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
|
||||
MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
|
||||
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
|
||||
*addr = CMD_ERASE_CONFIRM;
|
||||
|
||||
/* wait until flash is ready */
|
||||
chip1 = 0;
|
||||
|
||||
do {
|
||||
result = *addr;
|
||||
|
||||
/* check timeout */
|
||||
if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
|
||||
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
|
||||
chip1 = TMO;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
|
||||
chip1 = READY;
|
||||
|
||||
} while (!chip1);
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
|
||||
|
||||
if (chip1 == ERR) {
|
||||
rc = ERR_PROG_ERROR;
|
||||
goto outahere;
|
||||
}
|
||||
if (chip1 == TMO) {
|
||||
rc = ERR_TIMOUT;
|
||||
goto outahere;
|
||||
}
|
||||
|
||||
printf ("ok.\n");
|
||||
} else { /* it was protected */
|
||||
printf ("protected!\n");
|
||||
}
|
||||
}
|
||||
|
||||
if (ctrlc ())
|
||||
printf ("User Interrupt!\n");
|
||||
|
||||
outahere:
|
||||
/* allow flash to settle - wait 10 ms */
|
||||
udelay_masked (10000);
|
||||
|
||||
if (iflag)
|
||||
enable_interrupts ();
|
||||
|
||||
if (cflag)
|
||||
icache_enable ();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash
|
||||
*/
|
||||
|
||||
static int write_word (flash_info_t * info, ulong dest, ulong data)
|
||||
{
|
||||
volatile u16 *addr = (volatile u16 *) dest;
|
||||
ulong result;
|
||||
int rc = ERR_OK;
|
||||
int cflag, iflag;
|
||||
int chip1;
|
||||
ulong start;
|
||||
|
||||
/*
|
||||
* Check if Flash is (sufficiently) erased
|
||||
*/
|
||||
result = *addr;
|
||||
if ((result & data) != data)
|
||||
return ERR_NOT_ERASED;
|
||||
|
||||
/*
|
||||
* Disable interrupts which might cause a timeout
|
||||
* here. Remember that our exception vectors are
|
||||
* at address 0 in the flash, and we don't want a
|
||||
* (ticker) exception to happen while the flash
|
||||
* chip is in programming mode.
|
||||
*/
|
||||
cflag = icache_status ();
|
||||
icache_disable ();
|
||||
iflag = disable_interrupts ();
|
||||
|
||||
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
|
||||
MEM_FLASH_ADDR2 = CMD_UNLOCK2;
|
||||
MEM_FLASH_ADDR1 = CMD_PROGRAM;
|
||||
*addr = data;
|
||||
|
||||
/* arm simple, non interrupt dependent timer */
|
||||
start = get_timer(0);
|
||||
|
||||
/* wait until flash is ready */
|
||||
chip1 = 0;
|
||||
do {
|
||||
result = *addr;
|
||||
|
||||
/* check timeout */
|
||||
if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
|
||||
chip1 = ERR | TMO;
|
||||
break;
|
||||
}
|
||||
if (!chip1 && ((result & 0x80) == (data & 0x80)))
|
||||
chip1 = READY;
|
||||
|
||||
} while (!chip1);
|
||||
|
||||
*addr = CMD_READ_ARRAY;
|
||||
|
||||
if (chip1 == ERR || *addr != data)
|
||||
rc = ERR_PROG_ERROR;
|
||||
|
||||
if (iflag)
|
||||
enable_interrupts ();
|
||||
|
||||
if (cflag)
|
||||
icache_enable ();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash.
|
||||
*/
|
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong wp, data;
|
||||
int rc;
|
||||
|
||||
if (addr & 1) {
|
||||
printf ("unaligned destination not supported\n");
|
||||
return ERR_ALIGN;
|
||||
};
|
||||
|
||||
if ((int) src & 1) {
|
||||
printf ("unaligned source not supported\n");
|
||||
return ERR_ALIGN;
|
||||
};
|
||||
|
||||
wp = addr;
|
||||
|
||||
while (cnt >= 2) {
|
||||
data = *((volatile u16 *) src);
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
src += 2;
|
||||
wp += 2;
|
||||
cnt -= 2;
|
||||
}
|
||||
|
||||
if (cnt == 1) {
|
||||
data = (*((volatile u8 *) src)) | (*((volatile u8 *) (wp + 1)) <<
|
||||
8);
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
src += 1;
|
||||
wp += 1;
|
||||
cnt -= 1;
|
||||
};
|
||||
|
||||
return ERR_OK;
|
||||
}
|
||||
@ -1,80 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2006
|
||||
* Atmel Nordic AB <www.atmel.com>
|
||||
* Ulf Samuelsson <ulf@atmel.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/AT91RM9200.h>
|
||||
|
||||
#define GREEN_LED AT91C_PIO_PB0
|
||||
#define YELLOW_LED AT91C_PIO_PB1
|
||||
#define RED_LED AT91C_PIO_PB2
|
||||
|
||||
void green_LED_on(void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
PIOB->PIO_CODR = GREEN_LED;
|
||||
}
|
||||
|
||||
void yellow_LED_on(void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
PIOB->PIO_CODR = YELLOW_LED;
|
||||
}
|
||||
|
||||
void red_LED_on(void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
PIOB->PIO_CODR = RED_LED;
|
||||
}
|
||||
|
||||
void green_LED_off(void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
PIOB->PIO_SODR = GREEN_LED;
|
||||
}
|
||||
|
||||
void yellow_LED_off(void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
PIOB->PIO_SODR = YELLOW_LED;
|
||||
}
|
||||
|
||||
void red_LED_off(void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
PIOB->PIO_SODR = RED_LED;
|
||||
}
|
||||
|
||||
|
||||
void coloured_LED_init (void)
|
||||
{
|
||||
AT91PS_PIO PIOB = AT91C_BASE_PIOB;
|
||||
AT91PS_PMC PMC = AT91C_BASE_PMC;
|
||||
PMC->PMC_PCER = (1 << AT91C_ID_PIOB); /* Enable PIOB clock */
|
||||
/* Disable peripherals on LEDs */
|
||||
PIOB->PIO_PER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
|
||||
/* Enable pins as outputs */
|
||||
PIOB->PIO_OER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
|
||||
/* Turn all LEDs OFF */
|
||||
PIOB->PIO_SODR = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
|
||||
}
|
||||
@ -1,29 +0,0 @@
|
||||
#include <config.h>
|
||||
#include <common.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <dataflash.h>
|
||||
|
||||
int AT91F_GetMuxStatus(void) {
|
||||
AT91C_BASE_PIOB->PIO_PER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Set in PIO mode */
|
||||
AT91C_BASE_PIOB->PIO_OER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Configure in output */
|
||||
|
||||
|
||||
if(AT91C_BASE_PIOB->PIO_ODSR & CONFIG_SYS_DATAFLASH_MMC_PIO)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void AT91F_SelectMMC(void) {
|
||||
AT91C_BASE_PIOB->PIO_PER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Set in PIO mode */
|
||||
AT91C_BASE_PIOB->PIO_OER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Configure in output */
|
||||
/* Set Output */
|
||||
AT91C_BASE_PIOB->PIO_SODR = CONFIG_SYS_DATAFLASH_MMC_PIO;
|
||||
}
|
||||
|
||||
void AT91F_SelectSPI(void) {
|
||||
AT91C_BASE_PIOB->PIO_PER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Set in PIO mode */
|
||||
AT91C_BASE_PIOB->PIO_OER = CONFIG_SYS_DATAFLASH_MMC_PIO; /* Configure in output */
|
||||
/* Clear Output */
|
||||
AT91C_BASE_PIOB->PIO_CODR = CONFIG_SYS_DATAFLASH_MMC_PIO;
|
||||
}
|
||||
@ -1,40 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2008
|
||||
* Ulf Samuelsson <ulf@atmel.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <config.h>
|
||||
#include <asm/hardware.h>
|
||||
#include <dataflash.h>
|
||||
|
||||
AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
|
||||
|
||||
struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
|
||||
{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
|
||||
{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3}
|
||||
};
|
||||
|
||||
/*define the area offsets*/
|
||||
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
|
||||
{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
|
||||
{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
|
||||
{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
|
||||
{0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"},
|
||||
{0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"},
|
||||
};
|
||||
@ -57,7 +57,6 @@ at91rm9200ek_ram arm arm920t at91rm9200ek atmel
|
||||
eb_cpux9k2 arm arm920t - BuS at91
|
||||
cpuat91 arm arm920t cpuat91 eukrea at91 cpuat91
|
||||
cpuat91_ram arm arm920t cpuat91 eukrea at91 cpuat91:RAMBOOT
|
||||
at91rm9200dk arm arm920t - atmel at91rm9200
|
||||
mx1ads arm arm920t - - imx
|
||||
scb9328 arm arm920t - - imx
|
||||
cm4008 arm arm920t - - ks8695
|
||||
|
||||
@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
|
||||
|
||||
Board Arch CPU removed Commit last known maintainer/contact
|
||||
=============================================================================
|
||||
at91rm9200dk arm arm920t - 2011-07-17
|
||||
m501sk arm arm920t - 2011-07-17
|
||||
kb9202 arm arm920t - 2011-07-17
|
||||
csb637 arm arm920t - 2011-07-17
|
||||
|
||||
@ -1,202 +0,0 @@
|
||||
/*
|
||||
* Rick Bronson <rick@efn.org>
|
||||
*
|
||||
* Configuration settings for the AT91RM9200DK board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
|
||||
#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
|
||||
/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
|
||||
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
||||
|
||||
#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
|
||||
#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
|
||||
#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
#define USE_920T_MMU 1
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_USE_MAIN_OSCILLATOR 1
|
||||
/* flash */
|
||||
#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
|
||||
#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
|
||||
|
||||
/* clocks */
|
||||
#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
|
||||
#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */
|
||||
#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */
|
||||
|
||||
/* sdram */
|
||||
#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
|
||||
#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
|
||||
#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
|
||||
#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRAM 0x20000000 /* address of the CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
|
||||
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
|
||||
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
|
||||
/* define one of these to choose the DBGU, USART0 or USART1 as console */
|
||||
#define CONFIG_AT91RM9200_USART
|
||||
#define CONFIG_DBGU
|
||||
#undef CONFIG_USART0
|
||||
#undef CONFIG_USART1
|
||||
|
||||
#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
|
||||
|
||||
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
/* #define CONFIG_ENV_OVERWRITE 1 */
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_MII
|
||||
|
||||
#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM 0x20000000
|
||||
#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
||||
#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
|
||||
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#ifdef CONFIG_NET_MULTI
|
||||
#define CONFIG_DRIVER_AT91EMAC 1
|
||||
#define CONFIG_SYS_RX_ETH_BUFFER 8
|
||||
#else
|
||||
#define CONFIG_DRIVER_ETHER 1
|
||||
#endif
|
||||
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_AT91C_USE_RMII
|
||||
|
||||
/* AC Characteristics */
|
||||
/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
|
||||
#define DATAFLASH_TCSS (0xC << 16)
|
||||
#define DATAFLASH_TCHS (0x1 << 24)
|
||||
|
||||
#define CONFIG_HAS_DATAFLASH 1
|
||||
#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
|
||||
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
|
||||
#define CONFIG_SYS_MAX_DATAFLASH_PAGES 16384
|
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
|
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
|
||||
|
||||
#define PHYS_FLASH_1 0x10000000
|
||||
#define PHYS_FLASH_SIZE 0x200000 /* 2 megs main flash */
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 256
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
||||
|
||||
#undef CONFIG_ENV_IS_IN_DATAFLASH
|
||||
|
||||
#ifdef CONFIG_ENV_IS_IN_DATAFLASH
|
||||
#define CONFIG_ENV_OFFSET 0x20000
|
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
|
||||
#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
|
||||
#else
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
|
||||
#define CONFIG_ENV_SIZE 0x2000 /* 0x8000 */
|
||||
#else
|
||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
|
||||
#define CONFIG_ENV_SIZE 0x10000 /* sectors are 64K here */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
#endif /* CONFIG_ENV_IS_IN_DATAFLASH */
|
||||
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
|
||||
|
||||
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SYS_BOOT_SIZE 0x6000 /* 24 KBytes */
|
||||
#define CONFIG_SYS_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
|
||||
#define CONFIG_SYS_U_BOOT_SIZE 0x10000 /* 64 KBytes */
|
||||
#else
|
||||
#define CONFIG_SYS_BOOT_SIZE 0x00 /* 0 KBytes */
|
||||
#define CONFIG_SYS_U_BOOT_BASE PHYS_FLASH_1
|
||||
#define CONFIG_SYS_U_BOOT_SIZE 0x60000 /* 384 KBytes */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
|
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#error CONFIG_USE_IRQ not supported
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user