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spl: stm32f7: configure for xip booting
With xip booting configuration, we don't need to copy the next image (U-Boot or linux xipimage) from flash to sdram area. Flash memory organization is like this: spl-U-Boot: u-boot-spl.bin : 0x0800_0000 U-Boot : u-boot-dtb.bin : 0x0800_8000 linux : xipImage : 0x0800_8000 It is also possible to have U-Boot binary & linux binaries configured at different addresses of flash memory like U-Boot at 0x0800_8000 & linux xipImage at 0x0800_4000. But in any case, spl-U-Boot needs to be compiled for U-Boot as next binary with SPL_OS_BOOT option disabled. By default, spl is configured to boot linux xipImage. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
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parent
55a3ef714f
commit
1a73bd842e
@ -26,6 +26,7 @@ config STM32F7
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select SPL_RAM
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select SPL_RAM
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select SPL_SERIAL_SUPPORT
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select SPL_SERIAL_SUPPORT
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select SPL_SYS_MALLOC_SIMPLE
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select SPL_SYS_MALLOC_SIMPLE
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select SPL_XIP_SUPPORT
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source "arch/arm/mach-stm32/stm32f4/Kconfig"
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source "arch/arm/mach-stm32/stm32f4/Kconfig"
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source "arch/arm/mach-stm32/stm32f1/Kconfig"
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source "arch/arm/mach-stm32/stm32f1/Kconfig"
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@ -117,7 +117,7 @@ void spl_board_init(void)
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}
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}
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u32 spl_boot_device(void)
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u32 spl_boot_device(void)
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{
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{
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return BOOT_DEVICE_NOR;
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return BOOT_DEVICE_XIP;
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}
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}
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#endif
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#endif
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@ -12,17 +12,18 @@
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#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
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#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
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#ifdef CONFIG_SUPPORT_SPL
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#ifdef CONFIG_SUPPORT_SPL
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#define CONFIG_SYS_TEXT_BASE 0xC0000000
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#define CONFIG_SYS_TEXT_BASE 0x08008000
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#define CONFIG_SYS_LOAD_ADDR 0x08008000
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#else
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#else
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#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_LOAD_ADDR 0xC0400000
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#define CONFIG_LOADADDR 0xC0400000
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#endif
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#endif
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/*
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/*
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* Configuration of the external SDRAM memory
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* Configuration of the external SDRAM memory
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*/
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_LOAD_ADDR 0xC0400000
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#define CONFIG_LOADADDR 0xC0400000
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#define CONFIG_SYS_MAX_FLASH_SECT 8
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#define CONFIG_SYS_MAX_FLASH_SECT 8
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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@ -83,16 +84,13 @@
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#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_SPL_LEN 0x00008000
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#define CONFIG_SYS_SPL_LEN 0x00008000
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#define CONFIG_SYS_UBOOT_START 0XC00003FD
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#define CONFIG_SYS_UBOOT_START 0x080083FD
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#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
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#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
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CONFIG_SYS_SPL_LEN)
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CONFIG_SYS_SPL_LEN)
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#define CONFIG_SYS_OS_BASE 0x08040000
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/* DT blob (fdt) address */
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/* DT blob (fdt) address */
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#define CONFIG_SYS_SPL_ARGS_ADDR 0xC0000100
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#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
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#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
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0x1C0000)
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0x1C0000)
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#define CONFIG_SYS_FDT_SIZE (20*1024)
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#endif
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#endif
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/* For SPL ends */
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/* For SPL ends */
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