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arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config tool

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Update the ddr settings to use the DDR reg config tool rev 0.2.0.
This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order
to avoid DSS underflow errors.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
This commit is contained in:
Lokesh Vutla 2019-12-31 15:48:48 +05:30 committed by Tom Rini
parent c6ad93612a
commit 196d3e4017
1 changed files with 3 additions and 3 deletions
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6
arch/arm/dts/k3-j721e-ddr-evm-lp4-3733.dtsi
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@ -1,8 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
* This file was generated by the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool, Revision: 0.1.0
* This file was generated on 09/06/2019
* This file was generated by the AM752x_DRA82x_TDA4x_DDRSS_RegConfigTool, Revision: 0.2.0
* This file was generated on 10/09/2019
*/
#define DDRSS_PLL_FHS_CNT 10
@ -283,7 +283,7 @@
#define DDRSS_CTL_271_DATA 0x1FFF1000
#define DDRSS_CTL_272_DATA 0x01FF0000
#define DDRSS_CTL_273_DATA 0x000101FF
#define DDRSS_CTL_274_DATA 0xFFFF0B00
#define DDRSS_CTL_274_DATA 0x0FFF0B00
#define DDRSS_CTL_275_DATA 0x01010001
#define DDRSS_CTL_276_DATA 0x01010101
#define DDRSS_CTL_277_DATA 0x01180101