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m68k: add dspi chip-select support

Browse Source 
Signed-off-by: Angelo Dureghello <angelo@sysam.it>

Changes for v5:
- new patch
This commit is contained in:
Angelo Dureghello 2019-03-13 21:46:53 +01:00 committed by Tom Rini
parent cd3b0717ba
commit 196afe62d6
6 changed files with 139 additions and 3 deletions
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2
arch/m68k/cpu/mcf5227x/Makefile
View File

@ -6,4 +6,4 @@
# ccflags-y += -DET_DEBUG
extra-y = start.o
obj-y = cpu.o speed.o cpu_init.o interrupts.o
obj-y = cpu.o speed.o cpu_init.o interrupts.o dspi.o

43
arch/m68k/cpu/mcf5227x/dspi.c Normal file
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@ -0,0 +1,43 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2019
* Angelo Dureghello <angleo@sysam.it>
*
* CPU specific dspi routines
*/
#include <common.h>
#include <asm/immap.h>
#include <asm/io.h>
#ifdef CONFIG_CF_DSPI
void dspi_chip_select(int cs)
{
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
switch (cs) {
case 0:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
break;
case 2:
clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
break;
}
}
void dspi_chip_unselect(int cs)
{
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
switch (cs) {
case 0:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
break;
case 2:
clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
break;
}
}
#endif /* CONFIG_CF_DSPI */

3
arch/m68k/cpu/mcf5227x/start.S
View File

@ -378,7 +378,8 @@ _start:
clr.l %sp@-
/* run low-level board init code (from flash) */
bsr board_init_f
move.l #board_init_f, %a1
jsr (%a1)
/* board_init_f() does not return */

2
arch/m68k/cpu/mcf5445x/Makefile
View File

@ -6,4 +6,4 @@
# ccflags-y += -DET_DEBUG
extra-y = start.o
obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o
obj-y = cpu.o speed.o cpu_init.o interrupts.o pci.o dspi.o

88
arch/m68k/cpu/mcf5445x/dspi.c Normal file
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@ -0,0 +1,88 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2019
* Angelo Dureghello <angleo@sysam.it>
*
* CPU specific dspi routines
*/
#include <common.h>
#include <asm/immap.h>
#include <asm/io.h>
#ifdef CONFIG_CF_DSPI
void dspi_chip_select(int cs)
{
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
#ifdef CONFIG_MCF5445x
switch (cs) {
case 0:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
break;
case 1:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
break;
case 2:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
break;
case 3:
clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3);
break;
case 5:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
break;
}
#endif
#ifdef CONFIG_MCF5441x
switch (cs) {
case 0:
clrbits_8(&gpio->par_dspi0,
~GPIO_PAR_DSPI0_PCS0_MASK);
setbits_8(&gpio->par_dspi0,
GPIO_PAR_DSPI0_PCS0_DSPI0PCS0);
break;
case 1:
clrbits_8(&gpio->par_dspiow,
GPIO_PAR_DSPIOW_DSPI0PSC1);
setbits_8(&gpio->par_dspiow,
GPIO_PAR_DSPIOW_DSPI0PSC1);
break;
}
#endif
}
void dspi_chip_unselect(int cs)
{
struct gpio *gpio = (struct gpio *)MMAP_GPIO;
#ifdef CONFIG_MCF5445x
switch (cs) {
case 0:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
break;
case 1:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
break;
case 2:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
break;
case 3:
clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
break;
case 5:
clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
break;
}
#endif
#ifdef CONFIG_MCF5441x
if (cs == 1)
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
#endif
}
#endif /* CONFIG_CF_DSPI */

4
arch/m68k/include/asm/coldfire/dspi.h
View File

@ -138,4 +138,8 @@ typedef struct dspi {
/* Bit definitions and macros for DRFDR group */
#define DSPI_RFDR_RXDATA(x) (((x)&0x0000FFFF))
/* Architecture-related operations */
void dspi_chip_select(int cs);
void dspi_chip_unselect(int cs);
#endif /* __DSPI_H__ */