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x86: Set serial port IRQ for SMSC LPC47M

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For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-03-31 11:25:03 +08:00 committed by Simon Glass
parent d21d05f19a
commit 19268834fb
5 changed files with 9 additions and 4 deletions
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3
arch/x86/include/asm/ibmpc.h
View File

@ -21,4 +21,7 @@
#define UART0_BASE 0x3f8
#define UART1_BASE 0x2f8
#define UART0_IRQ 4
#define UART1_IRQ 3
#endif

2
board/intel/crownbay/crownbay.c
View File

@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
return 0;
}

2
board/intel/minnowmax/minnowmax.c
View File

@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE);
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
return 0;
}

3
drivers/misc/smsc_lpc47m.c
View File

@ -22,12 +22,13 @@ static void pnp_exit_conf_state(u16 dev)
outb(0xaa, port);
}
void lpc47m_enable_serial(u16 dev, u16 iobase)
void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq)
{
pnp_enter_conf_state(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_irq(dev, PNP_IDX_IRQ0, irq);
pnp_set_enable(dev, 1);
pnp_exit_conf_state(dev);
}

3
include/smsc_lpc47m.h
View File

@ -13,7 +13,8 @@
*
* @dev: High 8 bits = Super I/O port, low 8 bits = logical device number.
* @iobase: Processor I/O port address to assign to this serial device.
* @irq: Processor IRQ number to assign to this serial device.
*/
void lpc47m_enable_serial(u16 dev, u16 iobase);
void lpc47m_enable_serial(u16 dev, u16 iobase, u8 irq);
#endif /* _SMSC_LPC47M_H_ */