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arm: mvebu: a38x: Remove dead code ARMADA_39X
Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
2fa30d0484
commit
15942805b7
@ -164,7 +164,7 @@ int serdes_phy_config(void);
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int ddr3_init(void);
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int ddr3_init(void);
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/* Auto Voltage Scaling */
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/* Auto Voltage Scaling */
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#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X)
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#if defined(CONFIG_ARMADA_38X)
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void mv_avs_init(void);
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void mv_avs_init(void);
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void mv_rtc_config(void);
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void mv_rtc_config(void);
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#else
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#else
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@ -14,11 +14,6 @@
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#include "sys_env_lib.h"
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#include "sys_env_lib.h"
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#include "ctrl_pex.h"
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#include "ctrl_pex.h"
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#if defined(CONFIG_ARMADA_38X)
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#elif defined(CONFIG_ARMADA_39X)
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#else
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#error "No device is defined"
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#endif
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/*
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/*
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@ -79,11 +74,6 @@ u8 selectors_serdes_rev2_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {
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{ NA, 0x6, NA, NA, 0x4, NA, NA }, /* USB3_HOST0 */
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{ NA, 0x6, NA, NA, 0x4, NA, NA }, /* USB3_HOST0 */
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{ NA, NA, NA, 0x5, NA, 0x4, NA }, /* USB3_HOST1 */
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{ NA, NA, NA, 0x5, NA, 0x4, NA }, /* USB3_HOST1 */
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{ NA, NA, NA, 0x6, 0x5, 0x5, NA }, /* USB3_DEVICE */
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{ NA, NA, NA, 0x6, 0x5, 0x5, NA }, /* USB3_DEVICE */
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#ifdef CONFIG_ARMADA_39X
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{ NA, NA, 0x5, NA, 0x8, NA, 0x2 }, /* SGMII3 */
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{ NA, NA, NA, 0x8, 0x9, 0x8, 0x4 }, /* XAUI */
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{ NA, NA, NA, NA, NA, 0x8, 0x4 }, /* RXAUI */
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#endif
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{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, NA } /* DEFAULT_SERDES */
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{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, NA } /* DEFAULT_SERDES */
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};
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};
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@ -798,11 +788,9 @@ struct op_params serdes_power_down_params[] = {
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*/
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*/
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u8 hws_ctrl_serdes_rev_get(void)
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u8 hws_ctrl_serdes_rev_get(void)
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{
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{
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#ifdef CONFIG_ARMADA_38X
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/* for A38x-Z1 */
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/* for A38x-Z1 */
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if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID)
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if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID)
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return MV_SERDES_REV_1_2;
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return MV_SERDES_REV_1_2;
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#endif
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/* for A39x-Z1, A38x-A0 */
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/* for A39x-Z1, A38x-A0 */
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return MV_SERDES_REV_2_1;
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return MV_SERDES_REV_2_1;
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@ -1351,9 +1339,6 @@ enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type,
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case SGMII0:
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case SGMII0:
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case SGMII1:
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case SGMII1:
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case SGMII2:
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case SGMII2:
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#ifdef CONFIG_ARMADA_39X
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case SGMII3:
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#endif
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if (baud_rate == SERDES_SPEED_1_25_GBPS)
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if (baud_rate == SERDES_SPEED_1_25_GBPS)
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seq_id = SGMII_1_25_SPEED_CONFIG_SEQ;
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seq_id = SGMII_1_25_SPEED_CONFIG_SEQ;
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else if (baud_rate == SERDES_SPEED_3_125_GBPS)
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else if (baud_rate == SERDES_SPEED_3_125_GBPS)
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@ -1362,14 +1347,6 @@ enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type,
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case QSGMII:
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case QSGMII:
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seq_id = QSGMII_5_SPEED_CONFIG_SEQ;
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seq_id = QSGMII_5_SPEED_CONFIG_SEQ;
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break;
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break;
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#ifdef CONFIG_ARMADA_39X
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case XAUI:
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seq_id = XAUI_3_125_SPEED_CONFIG_SEQ;
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break;
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case RXAUI:
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seq_id = RXAUI_6_25_SPEED_CONFIG_SEQ;
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break;
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#endif
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default:
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default:
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return SERDES_LAST_SEQ;
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return SERDES_LAST_SEQ;
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}
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}
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@ -2054,13 +2031,6 @@ int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type,
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(serdes_num,
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(serdes_num,
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PEX_CONFIG_REF_CLOCK_100MHZ_SEQ));
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PEX_CONFIG_REF_CLOCK_100MHZ_SEQ));
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return MV_OK;
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return MV_OK;
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#ifdef CONFIG_ARMADA_39X
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case REF_CLOCK_40MHZ:
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CHECK_STATUS(mv_seq_exec
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(serdes_num,
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PEX_CONFIG_REF_CLOCK_40MHZ_SEQ));
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return MV_OK;
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#endif
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default:
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default:
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printf
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printf
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("%s: Error: ref_clock %d for SerDes lane #%d, type %d is not supported\n",
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("%s: Error: ref_clock %d for SerDes lane #%d, type %d is not supported\n",
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@ -2104,22 +2074,6 @@ int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type,
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return MV_BAD_PARAM;
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return MV_BAD_PARAM;
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}
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}
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break;
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break;
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#ifdef CONFIG_ARMADA_39X
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case SGMII3:
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case XAUI:
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case RXAUI:
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if (ref_clock == REF_CLOCK_25MHZ) {
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data1 = POWER_AND_PLL_CTRL_REG_25MHZ_VAL_1;
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} else if (ref_clock == REF_CLOCK_40MHZ) {
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data1 = POWER_AND_PLL_CTRL_REG_40MHZ_VAL;
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} else {
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printf
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("hws_ref_clock_set: ref clock is not valid for serdes type %d\n",
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serdes_type);
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return MV_BAD_PARAM;
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}
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break;
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#endif
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default:
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default:
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DEBUG_INIT_S("hws_ref_clock_set: not supported serdes type\n");
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DEBUG_INIT_S("hws_ref_clock_set: not supported serdes type\n");
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return MV_BAD_PARAM;
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return MV_BAD_PARAM;
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@ -12,7 +12,6 @@
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#include "seq_exec.h"
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#include "seq_exec.h"
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#include "sys_env_lib.h"
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#include "sys_env_lib.h"
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#ifdef CONFIG_ARMADA_38X
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enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
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enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
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/* 6820 6810 6811 6828 */
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/* 6820 6810 6811 6828 */
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/* PEX_UNIT_ID */ { 4, 3, 3, 4},
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/* PEX_UNIT_ID */ { 4, 3, 3, 4},
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@ -24,19 +23,6 @@ enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
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/* XAUI_UNIT_ID */ { 0, 0, 0, 0},
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/* XAUI_UNIT_ID */ { 0, 0, 0, 0},
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/* RXAUI_UNIT_ID */ { 0, 0, 0, 0}
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/* RXAUI_UNIT_ID */ { 0, 0, 0, 0}
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};
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};
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#else /* if (CONFIG_ARMADA_39X) */
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enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
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/* 6920 6928 */
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/* PEX_UNIT_ID */ { 4, 4},
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/* ETH_GIG_UNIT_ID */ { 3, 4},
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/* USB3H_UNIT_ID */ { 1, 2},
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/* USB3D_UNIT_ID */ { 0, 1},
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/* SATA_UNIT_ID */ { 0, 4},
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/* QSGMII_UNIT_ID */ { 0, 1},
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/* XAUI_UNIT_ID */ { 1, 1},
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/* RXAUI_UNIT_ID */ { 1, 1}
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};
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#endif
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u32 g_dev_id = -1;
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u32 g_dev_id = -1;
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@ -202,11 +188,7 @@ u16 sys_env_model_get(void)
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return ctrl_id;
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return ctrl_id;
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default:
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default:
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/* Device ID Default for A38x: 6820 , for A39x: 6920 */
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/* Device ID Default for A38x: 6820 , for A39x: 6920 */
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#ifdef CONFIG_ARMADA_38X
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default_ctrl_id = MV_6820_DEV_ID;
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default_ctrl_id = MV_6820_DEV_ID;
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#else
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default_ctrl_id = MV_6920_DEV_ID;
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#endif
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printf("%s: Error retrieving device ID (%x), using default ID = %x\n",
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printf("%s: Error retrieving device ID (%x), using default ID = %x\n",
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__func__, ctrl_id, default_ctrl_id);
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__func__, ctrl_id, default_ctrl_id);
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return default_ctrl_id;
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return default_ctrl_id;
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@ -261,9 +243,6 @@ void mv_rtc_config(void)
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{
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{
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u32 i, val;
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u32 i, val;
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if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X)))
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return;
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/* Activate pipe0 for read/write transaction, and set XBAR client number #1 */
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/* Activate pipe0 for read/write transaction, and set XBAR client number #1 */
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val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS |
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val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS |
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0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS;
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0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS;
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@ -278,9 +257,6 @@ void mv_avs_init(void)
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{
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{
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u32 sar_freq;
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u32 sar_freq;
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if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X)))
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return;
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reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
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reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
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reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
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reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
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@ -118,12 +118,8 @@
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/* TWSI addresses */
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/* TWSI addresses */
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/* starting from A38x A0, i2c address of EEPROM is 0x57 */
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/* starting from A38x A0, i2c address of EEPROM is 0x57 */
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#ifdef CONFIG_ARMADA_39X
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#define EEPROM_I2C_ADDR 0x50
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#else
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#define EEPROM_I2C_ADDR (sys_env_device_rev_get() == \
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#define EEPROM_I2C_ADDR (sys_env_device_rev_get() == \
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MV_88F68XX_Z1_ID ? 0x50 : 0x57)
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MV_88F68XX_Z1_ID ? 0x50 : 0x57)
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#endif
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#define RD_GET_MODE_ADDR 0x4c
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#define RD_GET_MODE_ADDR 0x4c
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#define DB_GET_MODE_SLM1363_ADDR 0x25
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#define DB_GET_MODE_SLM1363_ADDR 0x25
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#define DB_GET_MODE_SLM1364_ADDR 0x24
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#define DB_GET_MODE_SLM1364_ADDR 0x24
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@ -216,7 +212,6 @@
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#define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \
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#define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \
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A39X_MARVELL_BOARD_ID_BASE)
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A39X_MARVELL_BOARD_ID_BASE)
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#ifdef CONFIG_ARMADA_38X
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#define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE
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#define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE
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#define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0
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#define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0
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#define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1
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#define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1
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@ -227,18 +222,6 @@
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#define MV_MARVELL_BOARD_NUM A38X_MV_MARVELL_BOARD_NUM
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#define MV_MARVELL_BOARD_NUM A38X_MV_MARVELL_BOARD_NUM
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#define MV_DEFAULT_BOARD_ID DB_68XX_ID
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#define MV_DEFAULT_BOARD_ID DB_68XX_ID
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#define MV_DEFAULT_DEVICE_ID MV_6811
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#define MV_DEFAULT_DEVICE_ID MV_6811
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#elif defined(CONFIG_ARMADA_39X)
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#define CUTOMER_BOARD_ID_BASE A39X_CUSTOMER_BOARD_ID_BASE
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#define CUSTOMER_BOARD_ID0 A39X_CUSTOMER_BOARD_ID0
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#define CUSTOMER_BOARD_ID1 A39X_CUSTOMER_BOARD_ID1
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#define MV_MAX_CUSTOMER_BOARD_ID A39X_MV_MAX_CUSTOMER_BOARD_ID
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#define MV_CUSTOMER_BOARD_NUM A39X_MV_CUSTOMER_BOARD_NUM
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#define MARVELL_BOARD_ID_BASE A39X_MARVELL_BOARD_ID_BASE
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#define MV_MAX_MARVELL_BOARD_ID A39X_MV_MAX_MARVELL_BOARD_ID
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#define MV_MARVELL_BOARD_NUM A39X_MV_MARVELL_BOARD_NUM
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#define MV_DEFAULT_BOARD_ID A39X_DB_69XX_ID
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#define MV_DEFAULT_DEVICE_ID MV_6920
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#endif
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#define MV_INVALID_BOARD_ID 0xffffffff
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#define MV_INVALID_BOARD_ID 0xffffffff
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@ -295,11 +278,7 @@ enum {
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#define MV_6920_INDEX 0
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#define MV_6920_INDEX 0
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#define MV_6928_INDEX 1
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#define MV_6928_INDEX 1
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#ifdef CONFIG_ARMADA_38X
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#define MAX_DEV_ID_NUM 4
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#define MAX_DEV_ID_NUM 4
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#else
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#define MAX_DEV_ID_NUM 2
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#endif
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#define MV_6820_INDEX 0
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#define MV_6820_INDEX 0
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#define MV_6810_INDEX 1
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#define MV_6810_INDEX 1
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@ -340,21 +319,13 @@ enum suspend_wakeup_status {
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* If suspend to RAM is not supported set '-1'
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* If suspend to RAM is not supported set '-1'
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*/
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*/
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#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT
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#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT
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#ifdef CONFIG_ARMADA_38X
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#define MV_BOARD_WAKEUP_GPIO_INFO { \
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#define MV_BOARD_WAKEUP_GPIO_INFO { \
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{A38X_CUSTOMER_BOARD_ID0, -1 }, \
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{A38X_CUSTOMER_BOARD_ID0, -1 }, \
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{A38X_CUSTOMER_BOARD_ID0, -1 }, \
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{A38X_CUSTOMER_BOARD_ID0, -1 }, \
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};
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};
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#else
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#define MV_BOARD_WAKEUP_GPIO_INFO { \
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{A39X_CUSTOMER_BOARD_ID0, -1 }, \
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{A39X_CUSTOMER_BOARD_ID0, -1 }, \
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};
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#endif /* CONFIG_ARMADA_38X */
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#else
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#else
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#ifdef CONFIG_ARMADA_38X
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#define MV_BOARD_WAKEUP_GPIO_INFO { \
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#define MV_BOARD_WAKEUP_GPIO_INFO { \
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{RD_NAS_68XX_ID, -2 }, \
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{RD_NAS_68XX_ID, -2 }, \
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{DB_68XX_ID, -1 }, \
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{DB_68XX_ID, -1 }, \
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@ -364,12 +335,6 @@ enum suspend_wakeup_status {
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{DB_BP_6821_ID, -2 }, \
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{DB_BP_6821_ID, -2 }, \
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{DB_AMC_6820_ID, -2 }, \
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{DB_AMC_6820_ID, -2 }, \
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};
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};
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#else
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#define MV_BOARD_WAKEUP_GPIO_INFO { \
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{A39X_RD_69XX_ID, -1 }, \
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{A39X_DB_69XX_ID, -1 }, \
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};
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#endif /* CONFIG_ARMADA_38X */
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#endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */
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#endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */
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u32 mv_board_tclk_get(void);
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u32 mv_board_tclk_get(void);
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@ -915,10 +915,8 @@ int ddr3_tip_dynamic_write_leveling(u32 dev_num, int phase_remove)
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DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n"));
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DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n"));
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} else { /* check for training pass */
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} else { /* check for training pass */
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reg_data = data_read[0];
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reg_data = data_read[0];
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#if defined(CONFIG_ARMADA_38X) /* JIRA #1498 for 16 bit with ECC */
|
|
||||||
if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */
|
if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */
|
||||||
reg_data = 0;
|
reg_data = 0;
|
||||||
#endif
|
|
||||||
if (reg_data != PASS)
|
if (reg_data != PASS)
|
||||||
DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n"));
|
DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n"));
|
||||||
|
|
||||||
|
@ -559,11 +559,7 @@ static int ddr3_tip_a38x_get_medium_freq(int dev_num, enum mv_ddr_freq *freq)
|
|||||||
|
|
||||||
static int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr)
|
static int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr)
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_ARMADA_39X)
|
|
||||||
info_ptr->device_id = 0x6900;
|
|
||||||
#else
|
|
||||||
info_ptr->device_id = 0x6800;
|
info_ptr->device_id = 0x6800;
|
||||||
#endif
|
|
||||||
info_ptr->ck_delay = ck_delay;
|
info_ptr->ck_delay = ck_delay;
|
||||||
|
|
||||||
return MV_OK;
|
return MV_OK;
|
||||||
@ -666,11 +662,7 @@ static int mv_ddr_sw_db_init(u32 dev_num, u32 board_id)
|
|||||||
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_TIP_REV, MV_TIP_REV_4);
|
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_TIP_REV, MV_TIP_REV_4);
|
||||||
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_PHY_EDGE, MV_DDR_PHY_EDGE_POSITIVE);
|
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_PHY_EDGE, MV_DDR_PHY_EDGE_POSITIVE);
|
||||||
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_OCTET_PER_INTERFACE, DDR_INTERFACE_OCTETS_NUM);
|
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_OCTET_PER_INTERFACE, DDR_INTERFACE_OCTETS_NUM);
|
||||||
#ifdef CONFIG_ARMADA_39X
|
|
||||||
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 1);
|
|
||||||
#else
|
|
||||||
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 0);
|
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 0);
|
||||||
#endif
|
|
||||||
|
|
||||||
ca_delay = 0;
|
ca_delay = 0;
|
||||||
delay_enable = 1;
|
delay_enable = 1;
|
||||||
|
@ -79,7 +79,6 @@ enum suspend_wakeup_status {
|
|||||||
* If suspend to RAM is not supported set '-1'
|
* If suspend to RAM is not supported set '-1'
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef CONFIG_ARMADA_38X
|
|
||||||
#define MV_BOARD_WAKEUP_GPIO_INFO { \
|
#define MV_BOARD_WAKEUP_GPIO_INFO { \
|
||||||
{RD_NAS_68XX_ID, -2 }, \
|
{RD_NAS_68XX_ID, -2 }, \
|
||||||
{DB_68XX_ID, -1 }, \
|
{DB_68XX_ID, -1 }, \
|
||||||
@ -89,12 +88,6 @@ enum suspend_wakeup_status {
|
|||||||
{DB_BP_6821_ID, -2 }, \
|
{DB_BP_6821_ID, -2 }, \
|
||||||
{DB_AMC_6820_ID, -2 }, \
|
{DB_AMC_6820_ID, -2 }, \
|
||||||
};
|
};
|
||||||
#else
|
|
||||||
#define MV_BOARD_WAKEUP_GPIO_INFO { \
|
|
||||||
{A39X_RD_69XX_ID, -1 }, \
|
|
||||||
{A39X_DB_69XX_ID, -1 }, \
|
|
||||||
};
|
|
||||||
#endif /* CONFIG_ARMADA_38X */
|
|
||||||
|
|
||||||
enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void);
|
enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void);
|
||||||
u32 mv_ddr_sys_env_get_cs_ena_from_reg(void);
|
u32 mv_ddr_sys_env_get_cs_ena_from_reg(void);
|
||||||
|
@ -43,7 +43,6 @@ CONFIG_ARC_MMU_VER
|
|||||||
CONFIG_ARMADA100
|
CONFIG_ARMADA100
|
||||||
CONFIG_ARMADA100_FEC
|
CONFIG_ARMADA100_FEC
|
||||||
CONFIG_ARMADA168
|
CONFIG_ARMADA168
|
||||||
CONFIG_ARMADA_39X
|
|
||||||
CONFIG_ARMV7_SECURE_BASE
|
CONFIG_ARMV7_SECURE_BASE
|
||||||
CONFIG_ARMV7_SECURE_MAX_SIZE
|
CONFIG_ARMV7_SECURE_MAX_SIZE
|
||||||
CONFIG_ARMV7_SECURE_RESERVE_SIZE
|
CONFIG_ARMV7_SECURE_RESERVE_SIZE
|
||||||
|
@ -150,12 +150,12 @@ ifdef CONFIG_SYS_U_BOOT_OFFS
|
|||||||
HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS)
|
HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS)
|
||||||
endif
|
endif
|
||||||
|
|
||||||
ifneq ($(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X),)
|
ifneq ($(CONFIG_ARMADA_38X),)
|
||||||
HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE
|
HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE
|
||||||
endif
|
endif
|
||||||
|
|
||||||
# MXSImage needs LibSSL
|
# MXSImage needs LibSSL
|
||||||
ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),)
|
ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),)
|
||||||
HOSTCFLAGS_kwbimage.o += \
|
HOSTCFLAGS_kwbimage.o += \
|
||||||
$(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "")
|
$(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "")
|
||||||
HOSTLDLIBS_mkimage += \
|
HOSTLDLIBS_mkimage += \
|
||||||
|
Loading…
Reference in New Issue
Block a user