brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity

arm: mvebu: a38x: Remove dead code ARMADA_39X

Browse Source 
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.

Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Pali Rohár 2021-03-05 15:52:42 +01:00 committed by Stefan Roese
parent 2fa30d0484
commit 15942805b7
9 changed files with 3 additions and 126 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-mvebu/include/mach/cpu.h
View File

@ -164,7 +164,7 @@ int serdes_phy_config(void);
int ddr3_init(void); int ddr3_init(void);
/* Auto Voltage Scaling */ /* Auto Voltage Scaling */
#if defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_39X) #if defined(CONFIG_ARMADA_38X)
void mv_avs_init(void); void mv_avs_init(void);
void mv_rtc_config(void); void mv_rtc_config(void);
#else #else

46
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
View File

@ -14,11 +14,6 @@
#include "sys_env_lib.h" #include "sys_env_lib.h"
#include "ctrl_pex.h" #include "ctrl_pex.h"
#if defined(CONFIG_ARMADA_38X)
#elif defined(CONFIG_ARMADA_39X)
#else
#error "No device is defined"
#endif
/* /*
@ -79,11 +74,6 @@ u8 selectors_serdes_rev2_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {
{ NA, 0x6, NA, NA, 0x4, NA, NA }, /* USB3_HOST0 */ { NA, 0x6, NA, NA, 0x4, NA, NA }, /* USB3_HOST0 */
{ NA, NA, NA, 0x5, NA, 0x4, NA }, /* USB3_HOST1 */ { NA, NA, NA, 0x5, NA, 0x4, NA }, /* USB3_HOST1 */
{ NA, NA, NA, 0x6, 0x5, 0x5, NA }, /* USB3_DEVICE */ { NA, NA, NA, 0x6, 0x5, 0x5, NA }, /* USB3_DEVICE */
#ifdef CONFIG_ARMADA_39X
{ NA, NA, 0x5, NA, 0x8, NA, 0x2 }, /* SGMII3 */
{ NA, NA, NA, 0x8, 0x9, 0x8, 0x4 }, /* XAUI */
{ NA, NA, NA, NA, NA, 0x8, 0x4 }, /* RXAUI */
#endif
{ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, NA } /* DEFAULT_SERDES */ { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, NA } /* DEFAULT_SERDES */
}; };
@ -798,11 +788,9 @@ struct op_params serdes_power_down_params[] = {
*/ */
u8 hws_ctrl_serdes_rev_get(void) u8 hws_ctrl_serdes_rev_get(void)
{ {
#ifdef CONFIG_ARMADA_38X
/* for A38x-Z1 */ /* for A38x-Z1 */
if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID) if (sys_env_device_rev_get() == MV_88F68XX_Z1_ID)
return MV_SERDES_REV_1_2; return MV_SERDES_REV_1_2;
#endif
/* for A39x-Z1, A38x-A0 */ /* for A39x-Z1, A38x-A0 */
return MV_SERDES_REV_2_1; return MV_SERDES_REV_2_1;
@ -1351,9 +1339,6 @@ enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type,
case SGMII0: case SGMII0:
case SGMII1: case SGMII1:
case SGMII2: case SGMII2:
#ifdef CONFIG_ARMADA_39X
case SGMII3:
#endif
if (baud_rate == SERDES_SPEED_1_25_GBPS) if (baud_rate == SERDES_SPEED_1_25_GBPS)
seq_id = SGMII_1_25_SPEED_CONFIG_SEQ; seq_id = SGMII_1_25_SPEED_CONFIG_SEQ;
else if (baud_rate == SERDES_SPEED_3_125_GBPS) else if (baud_rate == SERDES_SPEED_3_125_GBPS)
@ -1362,14 +1347,6 @@ enum serdes_seq serdes_type_and_speed_to_speed_seq(enum serdes_type serdes_type,
case QSGMII: case QSGMII:
seq_id = QSGMII_5_SPEED_CONFIG_SEQ; seq_id = QSGMII_5_SPEED_CONFIG_SEQ;
break; break;
#ifdef CONFIG_ARMADA_39X
case XAUI:
seq_id = XAUI_3_125_SPEED_CONFIG_SEQ;
break;
case RXAUI:
seq_id = RXAUI_6_25_SPEED_CONFIG_SEQ;
break;
#endif
default: default:
return SERDES_LAST_SEQ; return SERDES_LAST_SEQ;
} }
@ -2054,13 +2031,6 @@ int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type,
(serdes_num, (serdes_num,
PEX_CONFIG_REF_CLOCK_100MHZ_SEQ)); PEX_CONFIG_REF_CLOCK_100MHZ_SEQ));
return MV_OK; return MV_OK;
#ifdef CONFIG_ARMADA_39X
case REF_CLOCK_40MHZ:
CHECK_STATUS(mv_seq_exec
(serdes_num,
PEX_CONFIG_REF_CLOCK_40MHZ_SEQ));
return MV_OK;
#endif
default: default:
printf printf
("%s: Error: ref_clock %d for SerDes lane #%d, type %d is not supported\n", ("%s: Error: ref_clock %d for SerDes lane #%d, type %d is not supported\n",
@ -2104,22 +2074,6 @@ int hws_ref_clock_set(u32 serdes_num, enum serdes_type serdes_type,
return MV_BAD_PARAM; return MV_BAD_PARAM;
} }
break; break;
#ifdef CONFIG_ARMADA_39X
case SGMII3:
case XAUI:
case RXAUI:
if (ref_clock == REF_CLOCK_25MHZ) {
data1 = POWER_AND_PLL_CTRL_REG_25MHZ_VAL_1;
} else if (ref_clock == REF_CLOCK_40MHZ) {
data1 = POWER_AND_PLL_CTRL_REG_40MHZ_VAL;
} else {
printf
("hws_ref_clock_set: ref clock is not valid for serdes type %d\n",
serdes_type);
return MV_BAD_PARAM;
}
break;
#endif
default: default:
DEBUG_INIT_S("hws_ref_clock_set: not supported serdes type\n"); DEBUG_INIT_S("hws_ref_clock_set: not supported serdes type\n");
return MV_BAD_PARAM; return MV_BAD_PARAM;

24
arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.c
View File

@ -12,7 +12,6 @@
#include "seq_exec.h" #include "seq_exec.h"
#include "sys_env_lib.h" #include "sys_env_lib.h"
#ifdef CONFIG_ARMADA_38X
enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = { enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
/* 6820 6810 6811 6828 */ /* 6820 6810 6811 6828 */
/* PEX_UNIT_ID */ { 4, 3, 3, 4}, /* PEX_UNIT_ID */ { 4, 3, 3, 4},
@ -24,19 +23,6 @@ enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
/* XAUI_UNIT_ID */ { 0, 0, 0, 0}, /* XAUI_UNIT_ID */ { 0, 0, 0, 0},
/* RXAUI_UNIT_ID */ { 0, 0, 0, 0} /* RXAUI_UNIT_ID */ { 0, 0, 0, 0}
}; };
#else /* if (CONFIG_ARMADA_39X) */
enum unit_id sys_env_soc_unit_nums[MAX_UNITS_ID][MAX_DEV_ID_NUM] = {
/* 6920 6928 */
/* PEX_UNIT_ID */ { 4, 4},
/* ETH_GIG_UNIT_ID */ { 3, 4},
/* USB3H_UNIT_ID */ { 1, 2},
/* USB3D_UNIT_ID */ { 0, 1},
/* SATA_UNIT_ID */ { 0, 4},
/* QSGMII_UNIT_ID */ { 0, 1},
/* XAUI_UNIT_ID */ { 1, 1},
/* RXAUI_UNIT_ID */ { 1, 1}
};
#endif
u32 g_dev_id = -1; u32 g_dev_id = -1;
@ -202,11 +188,7 @@ u16 sys_env_model_get(void)
return ctrl_id; return ctrl_id;
default: default:
/* Device ID Default for A38x: 6820 , for A39x: 6920 */ /* Device ID Default for A38x: 6820 , for A39x: 6920 */
#ifdef CONFIG_ARMADA_38X
default_ctrl_id = MV_6820_DEV_ID; default_ctrl_id = MV_6820_DEV_ID;
#else
default_ctrl_id = MV_6920_DEV_ID;
#endif
printf("%s: Error retrieving device ID (%x), using default ID = %x\n", printf("%s: Error retrieving device ID (%x), using default ID = %x\n",
__func__, ctrl_id, default_ctrl_id); __func__, ctrl_id, default_ctrl_id);
return default_ctrl_id; return default_ctrl_id;
@ -261,9 +243,6 @@ void mv_rtc_config(void)
{ {
u32 i, val; u32 i, val;
if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X)))
return;
/* Activate pipe0 for read/write transaction, and set XBAR client number #1 */ /* Activate pipe0 for read/write transaction, and set XBAR client number #1 */
val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS | val = 0x1 << DFX_PIPE_SELECT_PIPE0_ACTIVE_OFFS |
0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS; 0x1 << DFX_PIPE_SELECT_XBAR_CLIENT_SEL_OFFS;
@ -278,9 +257,6 @@ void mv_avs_init(void)
{ {
u32 sar_freq; u32 sar_freq;
if (!(IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARMADA_39X)))
return;
reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);
reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE); reg_write(AVS_DEBUG_CNTR_REG, AVS_DEBUG_CNTR_DEFAULT_VALUE);

35
arch/arm/mach-mvebu/serdes/a38x/sys_env_lib.h
View File

@ -118,12 +118,8 @@
/* TWSI addresses */ /* TWSI addresses */
/* starting from A38x A0, i2c address of EEPROM is 0x57 */ /* starting from A38x A0, i2c address of EEPROM is 0x57 */
#ifdef CONFIG_ARMADA_39X
#define EEPROM_I2C_ADDR 0x50
#else
#define EEPROM_I2C_ADDR (sys_env_device_rev_get() == \ #define EEPROM_I2C_ADDR (sys_env_device_rev_get() == \
MV_88F68XX_Z1_ID ? 0x50 : 0x57) MV_88F68XX_Z1_ID ? 0x50 : 0x57)
#endif
#define RD_GET_MODE_ADDR 0x4c #define RD_GET_MODE_ADDR 0x4c
#define DB_GET_MODE_SLM1363_ADDR 0x25 #define DB_GET_MODE_SLM1363_ADDR 0x25
#define DB_GET_MODE_SLM1364_ADDR 0x24 #define DB_GET_MODE_SLM1364_ADDR 0x24
@ -216,7 +212,6 @@
#define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \ #define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \
A39X_MARVELL_BOARD_ID_BASE) A39X_MARVELL_BOARD_ID_BASE)
#ifdef CONFIG_ARMADA_38X
#define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE #define CUTOMER_BOARD_ID_BASE A38X_CUSTOMER_BOARD_ID_BASE
#define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0 #define CUSTOMER_BOARD_ID0 A38X_CUSTOMER_BOARD_ID0
#define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1 #define CUSTOMER_BOARD_ID1 A38X_CUSTOMER_BOARD_ID1
@ -227,18 +222,6 @@
#define MV_MARVELL_BOARD_NUM A38X_MV_MARVELL_BOARD_NUM #define MV_MARVELL_BOARD_NUM A38X_MV_MARVELL_BOARD_NUM
#define MV_DEFAULT_BOARD_ID DB_68XX_ID #define MV_DEFAULT_BOARD_ID DB_68XX_ID
#define MV_DEFAULT_DEVICE_ID MV_6811 #define MV_DEFAULT_DEVICE_ID MV_6811
#elif defined(CONFIG_ARMADA_39X)
#define CUTOMER_BOARD_ID_BASE A39X_CUSTOMER_BOARD_ID_BASE
#define CUSTOMER_BOARD_ID0 A39X_CUSTOMER_BOARD_ID0
#define CUSTOMER_BOARD_ID1 A39X_CUSTOMER_BOARD_ID1
#define MV_MAX_CUSTOMER_BOARD_ID A39X_MV_MAX_CUSTOMER_BOARD_ID
#define MV_CUSTOMER_BOARD_NUM A39X_MV_CUSTOMER_BOARD_NUM
#define MARVELL_BOARD_ID_BASE A39X_MARVELL_BOARD_ID_BASE
#define MV_MAX_MARVELL_BOARD_ID A39X_MV_MAX_MARVELL_BOARD_ID
#define MV_MARVELL_BOARD_NUM A39X_MV_MARVELL_BOARD_NUM
#define MV_DEFAULT_BOARD_ID A39X_DB_69XX_ID
#define MV_DEFAULT_DEVICE_ID MV_6920
#endif
#define MV_INVALID_BOARD_ID 0xffffffff #define MV_INVALID_BOARD_ID 0xffffffff
@ -295,11 +278,7 @@ enum {
#define MV_6920_INDEX 0 #define MV_6920_INDEX 0
#define MV_6928_INDEX 1 #define MV_6928_INDEX 1
#ifdef CONFIG_ARMADA_38X
#define MAX_DEV_ID_NUM 4 #define MAX_DEV_ID_NUM 4
#else
#define MAX_DEV_ID_NUM 2
#endif
#define MV_6820_INDEX 0 #define MV_6820_INDEX 0
#define MV_6810_INDEX 1 #define MV_6810_INDEX 1
@ -340,21 +319,13 @@ enum suspend_wakeup_status {
* If suspend to RAM is not supported set '-1' * If suspend to RAM is not supported set '-1'
*/ */
#ifdef CONFIG_CUSTOMER_BOARD_SUPPORT #ifdef CONFIG_CUSTOMER_BOARD_SUPPORT
#ifdef CONFIG_ARMADA_38X
#define MV_BOARD_WAKEUP_GPIO_INFO { \ #define MV_BOARD_WAKEUP_GPIO_INFO { \
{A38X_CUSTOMER_BOARD_ID0, -1 }, \ {A38X_CUSTOMER_BOARD_ID0, -1 }, \
{A38X_CUSTOMER_BOARD_ID0, -1 }, \ {A38X_CUSTOMER_BOARD_ID0, -1 }, \
}; };
#else
#define MV_BOARD_WAKEUP_GPIO_INFO { \
{A39X_CUSTOMER_BOARD_ID0, -1 }, \
{A39X_CUSTOMER_BOARD_ID0, -1 }, \
};
#endif /* CONFIG_ARMADA_38X */
#else #else
#ifdef CONFIG_ARMADA_38X
#define MV_BOARD_WAKEUP_GPIO_INFO { \ #define MV_BOARD_WAKEUP_GPIO_INFO { \
{RD_NAS_68XX_ID, -2 }, \ {RD_NAS_68XX_ID, -2 }, \
{DB_68XX_ID, -1 }, \ {DB_68XX_ID, -1 }, \
@ -364,12 +335,6 @@ enum suspend_wakeup_status {
{DB_BP_6821_ID, -2 }, \ {DB_BP_6821_ID, -2 }, \
{DB_AMC_6820_ID, -2 }, \ {DB_AMC_6820_ID, -2 }, \
}; };
#else
#define MV_BOARD_WAKEUP_GPIO_INFO { \
{A39X_RD_69XX_ID, -1 }, \
{A39X_DB_69XX_ID, -1 }, \
};
#endif /* CONFIG_ARMADA_38X */
#endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */ #endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */
u32 mv_board_tclk_get(void); u32 mv_board_tclk_get(void);

2
drivers/ddr/marvell/a38x/ddr3_training_leveling.c
View File

@ -915,10 +915,8 @@ int ddr3_tip_dynamic_write_leveling(u32 dev_num, int phase_remove)
DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n")); DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n"));
} else { /* check for training pass */ } else { /* check for training pass */
reg_data = data_read[0]; reg_data = data_read[0];
#if defined(CONFIG_ARMADA_38X) /* JIRA #1498 for 16 bit with ECC */
if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */ if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */
reg_data = 0; reg_data = 0;
#endif
if (reg_data != PASS) if (reg_data != PASS)
DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n")); DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n"));

8
drivers/ddr/marvell/a38x/mv_ddr_plat.c
View File

@ -559,11 +559,7 @@ static int ddr3_tip_a38x_get_medium_freq(int dev_num, enum mv_ddr_freq *freq)
static int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr) static int ddr3_tip_a38x_get_device_info(u8 dev_num, struct ddr3_device_info *info_ptr)
{ {
#if defined(CONFIG_ARMADA_39X)
info_ptr->device_id = 0x6900;
#else
info_ptr->device_id = 0x6800; info_ptr->device_id = 0x6800;
#endif
info_ptr->ck_delay = ck_delay; info_ptr->ck_delay = ck_delay;
return MV_OK; return MV_OK;
@ -666,11 +662,7 @@ static int mv_ddr_sw_db_init(u32 dev_num, u32 board_id)
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_TIP_REV, MV_TIP_REV_4); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_TIP_REV, MV_TIP_REV_4);
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_PHY_EDGE, MV_DDR_PHY_EDGE_POSITIVE); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_PHY_EDGE, MV_DDR_PHY_EDGE_POSITIVE);
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_OCTET_PER_INTERFACE, DDR_INTERFACE_OCTETS_NUM); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_OCTET_PER_INTERFACE, DDR_INTERFACE_OCTETS_NUM);
#ifdef CONFIG_ARMADA_39X
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 1);
#else
ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 0); ddr3_tip_dev_attr_set(dev_num, MV_ATTR_INTERLEAVE_WA, 0);
#endif
ca_delay = 0; ca_delay = 0;
delay_enable = 1; delay_enable = 1;

7
drivers/ddr/marvell/a38x/mv_ddr_sys_env_lib.h
View File

@ -79,7 +79,6 @@ enum suspend_wakeup_status {
* If suspend to RAM is not supported set '-1' * If suspend to RAM is not supported set '-1'
*/ */
#ifdef CONFIG_ARMADA_38X
#define MV_BOARD_WAKEUP_GPIO_INFO { \ #define MV_BOARD_WAKEUP_GPIO_INFO { \
{RD_NAS_68XX_ID, -2 }, \ {RD_NAS_68XX_ID, -2 }, \
{DB_68XX_ID, -1 }, \ {DB_68XX_ID, -1 }, \
@ -89,12 +88,6 @@ enum suspend_wakeup_status {
{DB_BP_6821_ID, -2 }, \ {DB_BP_6821_ID, -2 }, \
{DB_AMC_6820_ID, -2 }, \ {DB_AMC_6820_ID, -2 }, \
}; };
#else
#define MV_BOARD_WAKEUP_GPIO_INFO { \
{A39X_RD_69XX_ID, -1 }, \
{A39X_DB_69XX_ID, -1 }, \
};
#endif /* CONFIG_ARMADA_38X */
enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void); enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void);
u32 mv_ddr_sys_env_get_cs_ena_from_reg(void); u32 mv_ddr_sys_env_get_cs_ena_from_reg(void);

1
scripts/config_whitelist.txt
View File

@ -43,7 +43,6 @@ CONFIG_ARC_MMU_VER
CONFIG_ARMADA100 CONFIG_ARMADA100
CONFIG_ARMADA100_FEC CONFIG_ARMADA100_FEC
CONFIG_ARMADA168 CONFIG_ARMADA168
CONFIG_ARMADA_39X
CONFIG_ARMV7_SECURE_BASE CONFIG_ARMV7_SECURE_BASE
CONFIG_ARMV7_SECURE_MAX_SIZE CONFIG_ARMV7_SECURE_MAX_SIZE
CONFIG_ARMV7_SECURE_RESERVE_SIZE CONFIG_ARMV7_SECURE_RESERVE_SIZE

4
tools/Makefile
View File

@ -150,12 +150,12 @@ ifdef CONFIG_SYS_U_BOOT_OFFS
HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS) HOSTCFLAGS_kwbimage.o += -DCONFIG_SYS_U_BOOT_OFFS=$(CONFIG_SYS_U_BOOT_OFFS)
endif endif
ifneq ($(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X),) ifneq ($(CONFIG_ARMADA_38X),)
HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE HOSTCFLAGS_kwbimage.o += -DCONFIG_KWB_SECURE
endif endif
# MXSImage needs LibSSL # MXSImage needs LibSSL
ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),) ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_FIT_SIGNATURE)$(CONFIG_FIT_CIPHER),)
HOSTCFLAGS_kwbimage.o += \ HOSTCFLAGS_kwbimage.o += \
$(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "") $(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "")
HOSTLDLIBS_mkimage += \ HOSTLDLIBS_mkimage += \