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drivers/usb : Define usb control register mask for w1c bits
Define and use CONTROL_REGISTER_W1C_MASK to make sure that w1c bits of usb control register do not get reset while writing any other bit Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@ -104,15 +104,20 @@ int ehci_hcd_init(int index, enum usb_init_type init,
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if (!strncmp(phy_type, "utmi", 4)) {
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if (!strncmp(phy_type, "utmi", 4)) {
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#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
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#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
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setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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setbits_be32(&ehci->control, UTMI_PHY_EN);
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PHY_CLK_SEL_UTMI);
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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UTMI_PHY_EN);
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udelay(1000); /* delay required for PHY Clk to appear */
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udelay(1000); /* delay required for PHY Clk to appear */
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#endif
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#endif
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out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
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out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
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setbits_be32(&ehci->control, USB_EN);
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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USB_EN);
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} else {
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} else {
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setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
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PHY_CLK_SEL_ULPI);
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clrsetbits_be32(&ehci->control, UTMI_PHY_EN |
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CONTROL_REGISTER_W1C_MASK, USB_EN);
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udelay(1000); /* delay required for PHY Clk to appear */
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udelay(1000); /* delay required for PHY Clk to appear */
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if (!usb_phy_clk_valid(ehci))
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if (!usb_phy_clk_valid(ehci))
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return -EINVAL;
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return -EINVAL;
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@ -11,6 +11,8 @@
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#include <asm/processor.h>
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#include <asm/processor.h>
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#define CONTROL_REGISTER_W1C_MASK 0x00020000 /* W1C: PHY_CLK_VALID */
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/* Global offsets */
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/* Global offsets */
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#define FSL_SKIP_PCI 0x100
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#define FSL_SKIP_PCI 0x100
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