tegra: video: fix tegra_dc_sor_config_panel()

Bitwise OR has a higher operator precedence than the ternary conditional.
Add the missing parentheses.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This commit is contained in:
Heinrich Schuchardt 2021-04-05 01:48:51 +02:00 committed by Anatolij Gustschin
parent 83064c2706
commit 131c224168
1 changed files with 2 additions and 2 deletions

View File

@ -671,8 +671,8 @@ static void tegra_dc_sor_config_panel(struct tegra_dc_sor_data *sor,
CSTM_ROTCLK_DEFAULT_MASK |
CSTM_LVDS_EN_ENABLE,
2 << CSTM_ROTCLK_SHIFT |
is_lvds ? CSTM_LVDS_EN_ENABLE :
CSTM_LVDS_EN_DISABLE);
(is_lvds ? CSTM_LVDS_EN_ENABLE :
CSTM_LVDS_EN_DISABLE));
tegra_dc_sor_config_pwm(sor, 1024, 1024);
}