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video: rockchip: Add missing dpcd_write() call to link_train_ce()

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Found this by comparing it to the coreboot driver, a form of this call
was introduced there in their commit b9a7877568cf ("rockchip/*: refactor
edp driver"). This is copy-pasted from U-Boot's link_train_cr() slightly
above it.

Without this on a gru-kevin chromebook, I have:

    clock recovery at voltage 0 pre-emphasis 0
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    channel eq failed, ret=-5
    link train failed!
    rk_vop_probe() Device failed: ret=-5

With this, it looks like training succeeds:

    clock recovery at voltage 0 pre-emphasis 0
    requested signal parameters: lane 0 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 3.5dB
    using signal parameters: voltage 0.4V pre_emph 3.5dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 6dB
    using signal parameters: voltage 0.4V pre_emph 6dB
    requested signal parameters: lane 0 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 1 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 2 voltage 0.4V pre_emph 0dB
    requested signal parameters: lane 3 voltage 0.4V pre_emph 0dB
    using signal parameters: voltage 0.4V pre_emph 0dB
    channel eq at voltage 0 pre-emphasis 0
    config video failed
    rk_vop_probe() Device failed: ret=-110

The "config video failed" error also goes away when I disable higher
log levels, and it claims to have successfully probed the device.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This commit is contained in:
Alper Nebi Yasak 2020-10-06 23:39:51 +03:00 committed by Kever Yang
parent 2db36c64bd
commit 127c8d85cf
1 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/video/rockchip/rk_edp.c
View File

@ -559,6 +559,12 @@ static int rk_edp_link_train_ce(struct rk_edp_priv *edp)
channel_eq = 0;
for (tries = 0; tries < 5; tries++) {
rk_edp_set_link_training(edp, edp->train_set);
ret = rk_edp_dpcd_write(regs, DPCD_TRAINING_LANE0_SET,
edp->train_set,
edp->link_train.lane_count);
if (ret)
return ret;
udelay(400);
if (rk_edp_dpcd_read_link_status(edp, status) < 0) {