Kconfig: Drop CONFIG_CMD_DS4510

This option enables a command in the driver. But the functions defined by
the driver are not called anywhere else in U-Boot. So it does not seem
useful to have this driver without its commands.

Drop this option, move the header file out of the common include/
directory and make all the function static.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Simon Glass 2017-05-17 03:25:01 -06:00 committed by Tom Rini
parent 8dd026bffd
commit 1136eb5e8f
5 changed files with 10 additions and 25 deletions

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@ -12,7 +12,7 @@
#include <common.h> #include <common.h>
#include <i2c.h> #include <i2c.h>
#include <command.h> #include <command.h>
#include <ds4510.h> #include "ds4510.h"
/* Default to an address that hopefully won't corrupt other i2c devices */ /* Default to an address that hopefully won't corrupt other i2c devices */
#ifndef CONFIG_SYS_I2C_DS4510_ADDR #ifndef CONFIG_SYS_I2C_DS4510_ADDR
@ -35,7 +35,7 @@ enum {
/* /*
* Write to DS4510, taking page boundaries into account * Write to DS4510, taking page boundaries into account
*/ */
int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count) static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
{ {
int wrlen; int wrlen;
int i = 0; int i = 0;
@ -64,7 +64,7 @@ int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
/* /*
* General read from DS4510 * General read from DS4510
*/ */
int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count) static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
{ {
return i2c_read(chip, offset, 1, buf, count); return i2c_read(chip, offset, 1, buf, count);
} }
@ -74,7 +74,7 @@ int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
* nv = 0 - Writes to SEEPROM registers behave like EEPROM * nv = 0 - Writes to SEEPROM registers behave like EEPROM
* nv = 1 - Writes to SEEPROM registers behave like SRAM * nv = 1 - Writes to SEEPROM registers behave like SRAM
*/ */
int ds4510_see_write(uint8_t chip, uint8_t nv) static int ds4510_see_write(uint8_t chip, uint8_t nv)
{ {
uint8_t data; uint8_t data;
@ -92,7 +92,7 @@ int ds4510_see_write(uint8_t chip, uint8_t nv)
/* /*
* Write de-assertion of reset signal delay * Write de-assertion of reset signal delay
*/ */
int ds4510_rstdelay_write(uint8_t chip, uint8_t delay) static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
{ {
uint8_t data; uint8_t data;
@ -108,7 +108,7 @@ int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
/* /*
* Write pullup characteristics of IO pins * Write pullup characteristics of IO pins
*/ */
int ds4510_pullup_write(uint8_t chip, uint8_t val) static int ds4510_pullup_write(uint8_t chip, uint8_t val)
{ {
val &= DS4510_IO_MASK; val &= DS4510_IO_MASK;
@ -118,7 +118,7 @@ int ds4510_pullup_write(uint8_t chip, uint8_t val)
/* /*
* Read pullup characteristics of IO pins * Read pullup characteristics of IO pins
*/ */
int ds4510_pullup_read(uint8_t chip) static int ds4510_pullup_read(uint8_t chip)
{ {
uint8_t val; uint8_t val;
@ -131,7 +131,7 @@ int ds4510_pullup_read(uint8_t chip)
/* /*
* Write drive level of IO pins * Write drive level of IO pins
*/ */
int ds4510_gpio_write(uint8_t chip, uint8_t val) static int ds4510_gpio_write(uint8_t chip, uint8_t val)
{ {
uint8_t data; uint8_t data;
int i; int i;
@ -155,7 +155,7 @@ int ds4510_gpio_write(uint8_t chip, uint8_t val)
/* /*
* Read drive level of IO pins * Read drive level of IO pins
*/ */
int ds4510_gpio_read(uint8_t chip) static int ds4510_gpio_read(uint8_t chip)
{ {
uint8_t data; uint8_t data;
int val = 0; int val = 0;
@ -175,7 +175,7 @@ int ds4510_gpio_read(uint8_t chip)
/* /*
* Read physical level of IO pins * Read physical level of IO pins
*/ */
int ds4510_gpio_read_val(uint8_t chip) static int ds4510_gpio_read_val(uint8_t chip)
{ {
uint8_t val; uint8_t val;
@ -185,7 +185,6 @@ int ds4510_gpio_read_val(uint8_t chip)
return val & DS4510_IO_MASK; return val & DS4510_IO_MASK;
} }
#ifdef CONFIG_CMD_DS4510
/* /*
* Display DS4510 information * Display DS4510 information
*/ */
@ -384,4 +383,3 @@ U_BOOT_CMD(
"ds4510 sram write addr off cnt\n" "ds4510 sram write addr off cnt\n"
" - read/write 'cnt' bytes at SRAM offset 'off'" " - read/write 'cnt' bytes at SRAM offset 'off'"
); );
#endif /* CONFIG_CMD_DS4510 */

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@ -50,14 +50,4 @@
#define DS4510_SRAM 0xfa #define DS4510_SRAM 0xfa
#define DS4510_SRAM_SIZE 0x06 #define DS4510_SRAM_SIZE 0x06
int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count);
int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count);
int ds4510_see_write(uint8_t chip, uint8_t nv);
int ds4510_rstdelay_write(uint8_t chip, uint8_t delay);
int ds4510_pullup_write(uint8_t chip, uint8_t val);
int ds4510_pullup_read(uint8_t chip);
int ds4510_gpio_write(uint8_t chip, uint8_t val);
int ds4510_gpio_read(uint8_t chip);
int ds4510_gpio_read_val(uint8_t chip);
#endif /* __DS4510_H_ */ #endif /* __DS4510_H_ */

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@ -502,7 +502,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
/* /*
* Command configuration. * Command configuration.
*/ */
#define CONFIG_CMD_DS4510
#define CONFIG_CMD_DTT #define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IRQ #define CONFIG_CMD_IRQ

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@ -354,7 +354,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
/* /*
* Command configuration. * Command configuration.
*/ */
#define CONFIG_CMD_DS4510
#define CONFIG_CMD_DTT #define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM #define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_JFFS2

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@ -383,7 +383,6 @@ CONFIG_CM922T_XA10
CONFIG_CMDLINE_EDITING CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG CONFIG_CMDLINE_TAG
CONFIG_CMD_DS4510
CONFIG_CMD_DTT CONFIG_CMD_DTT
CONFIG_CMD_ECCTEST CONFIG_CMD_ECCTEST
CONFIG_CMD_EECONFIG CONFIG_CMD_EECONFIG