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https://github.com/brain-hackers/u-boot-brain
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Kconfig: Drop CONFIG_CMD_DS4510
This option enables a command in the driver. But the functions defined by the driver are not called anywhere else in U-Boot. So it does not seem useful to have this driver without its commands. Drop this option, move the header file out of the common include/ directory and make all the function static. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
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@ -12,7 +12,7 @@
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#include <common.h>
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#include <common.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <command.h>
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#include <command.h>
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#include <ds4510.h>
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#include "ds4510.h"
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/* Default to an address that hopefully won't corrupt other i2c devices */
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/* Default to an address that hopefully won't corrupt other i2c devices */
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#ifndef CONFIG_SYS_I2C_DS4510_ADDR
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#ifndef CONFIG_SYS_I2C_DS4510_ADDR
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@ -35,7 +35,7 @@ enum {
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/*
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/*
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* Write to DS4510, taking page boundaries into account
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* Write to DS4510, taking page boundaries into account
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*/
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*/
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int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
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static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
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{
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{
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int wrlen;
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int wrlen;
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int i = 0;
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int i = 0;
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@ -64,7 +64,7 @@ int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
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/*
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/*
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* General read from DS4510
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* General read from DS4510
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*/
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*/
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int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
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static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
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{
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{
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return i2c_read(chip, offset, 1, buf, count);
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return i2c_read(chip, offset, 1, buf, count);
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}
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}
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@ -74,7 +74,7 @@ int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
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* nv = 0 - Writes to SEEPROM registers behave like EEPROM
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* nv = 0 - Writes to SEEPROM registers behave like EEPROM
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* nv = 1 - Writes to SEEPROM registers behave like SRAM
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* nv = 1 - Writes to SEEPROM registers behave like SRAM
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*/
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*/
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int ds4510_see_write(uint8_t chip, uint8_t nv)
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static int ds4510_see_write(uint8_t chip, uint8_t nv)
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{
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{
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uint8_t data;
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uint8_t data;
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@ -92,7 +92,7 @@ int ds4510_see_write(uint8_t chip, uint8_t nv)
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/*
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/*
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* Write de-assertion of reset signal delay
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* Write de-assertion of reset signal delay
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*/
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*/
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int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
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static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
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{
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{
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uint8_t data;
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uint8_t data;
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@ -108,7 +108,7 @@ int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
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/*
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/*
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* Write pullup characteristics of IO pins
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* Write pullup characteristics of IO pins
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*/
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*/
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int ds4510_pullup_write(uint8_t chip, uint8_t val)
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static int ds4510_pullup_write(uint8_t chip, uint8_t val)
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{
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{
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val &= DS4510_IO_MASK;
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val &= DS4510_IO_MASK;
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@ -118,7 +118,7 @@ int ds4510_pullup_write(uint8_t chip, uint8_t val)
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/*
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/*
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* Read pullup characteristics of IO pins
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* Read pullup characteristics of IO pins
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*/
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*/
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int ds4510_pullup_read(uint8_t chip)
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static int ds4510_pullup_read(uint8_t chip)
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{
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{
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uint8_t val;
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uint8_t val;
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@ -131,7 +131,7 @@ int ds4510_pullup_read(uint8_t chip)
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/*
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/*
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* Write drive level of IO pins
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* Write drive level of IO pins
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*/
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*/
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int ds4510_gpio_write(uint8_t chip, uint8_t val)
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static int ds4510_gpio_write(uint8_t chip, uint8_t val)
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{
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{
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uint8_t data;
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uint8_t data;
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int i;
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int i;
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@ -155,7 +155,7 @@ int ds4510_gpio_write(uint8_t chip, uint8_t val)
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/*
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/*
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* Read drive level of IO pins
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* Read drive level of IO pins
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*/
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*/
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int ds4510_gpio_read(uint8_t chip)
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static int ds4510_gpio_read(uint8_t chip)
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{
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{
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uint8_t data;
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uint8_t data;
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int val = 0;
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int val = 0;
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@ -175,7 +175,7 @@ int ds4510_gpio_read(uint8_t chip)
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/*
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/*
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* Read physical level of IO pins
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* Read physical level of IO pins
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*/
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*/
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int ds4510_gpio_read_val(uint8_t chip)
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static int ds4510_gpio_read_val(uint8_t chip)
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{
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{
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uint8_t val;
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uint8_t val;
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@ -185,7 +185,6 @@ int ds4510_gpio_read_val(uint8_t chip)
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return val & DS4510_IO_MASK;
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return val & DS4510_IO_MASK;
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}
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}
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#ifdef CONFIG_CMD_DS4510
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/*
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/*
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* Display DS4510 information
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* Display DS4510 information
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*/
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*/
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@ -384,4 +383,3 @@ U_BOOT_CMD(
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"ds4510 sram write addr off cnt\n"
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"ds4510 sram write addr off cnt\n"
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" - read/write 'cnt' bytes at SRAM offset 'off'"
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" - read/write 'cnt' bytes at SRAM offset 'off'"
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);
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);
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#endif /* CONFIG_CMD_DS4510 */
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@ -50,14 +50,4 @@
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#define DS4510_SRAM 0xfa
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#define DS4510_SRAM 0xfa
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#define DS4510_SRAM_SIZE 0x06
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#define DS4510_SRAM_SIZE 0x06
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int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count);
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int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count);
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int ds4510_see_write(uint8_t chip, uint8_t nv);
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int ds4510_rstdelay_write(uint8_t chip, uint8_t delay);
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int ds4510_pullup_write(uint8_t chip, uint8_t val);
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int ds4510_pullup_read(uint8_t chip);
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int ds4510_gpio_write(uint8_t chip, uint8_t val);
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int ds4510_gpio_read(uint8_t chip);
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int ds4510_gpio_read_val(uint8_t chip);
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#endif /* __DS4510_H_ */
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#endif /* __DS4510_H_ */
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@ -502,7 +502,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
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/*
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/*
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* Command configuration.
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* Command configuration.
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*/
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*/
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#define CONFIG_CMD_DS4510
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#define CONFIG_CMD_DTT
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#define CONFIG_CMD_DTT
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_IRQ
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#define CONFIG_CMD_IRQ
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@ -354,7 +354,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
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/*
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/*
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* Command configuration.
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* Command configuration.
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*/
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*/
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#define CONFIG_CMD_DS4510
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#define CONFIG_CMD_DTT
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#define CONFIG_CMD_DTT
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_JFFS2
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@ -383,7 +383,6 @@ CONFIG_CM922T_XA10
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CONFIG_CMDLINE_EDITING
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CONFIG_CMDLINE_EDITING
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CONFIG_CMDLINE_PS_SUPPORT
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CONFIG_CMDLINE_PS_SUPPORT
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CONFIG_CMDLINE_TAG
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CONFIG_CMDLINE_TAG
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CONFIG_CMD_DS4510
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CONFIG_CMD_DTT
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CONFIG_CMD_DTT
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CONFIG_CMD_ECCTEST
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CONFIG_CMD_ECCTEST
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CONFIG_CMD_EECONFIG
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CONFIG_CMD_EECONFIG
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