x86: Reduce mrccache record alignment size

At present the records are 4KB in size. This is unnecessarily large when
the SPI-flash erase size is 256 bytes. Reduce it so it will be more
efficient with Apollo Lake's 24-byte variable-data record.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2019-12-06 21:42:01 -07:00 committed by Bin Meng
parent b93757caa1
commit 112629c53a

View File

@ -7,7 +7,7 @@
#ifndef _ASM_MRCCACHE_H
#define _ASM_MRCCACHE_H
#define MRC_DATA_ALIGN 0x1000
#define MRC_DATA_ALIGN 0x100
#define MRC_DATA_SIGNATURE (('M' << 0) | ('R' << 8) | \
('C' << 16) | ('D'<<24))