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pci: pci_mvebu: refactor validation of addresses for config access
Refactor validation of bdf parameter in mvebu_pcie_read/write_config functions. We can simplify the code by putting the validation into separate function. Also there are always only two devices visible on local bus: * on slot configured by function mvebu_pcie_set_local_dev_nr() (by default this register is set to 0) there is a "Marvell Memory controller", which isn't useful in root complex mode, * on all other slots the real PCIe card connected to the PCIe slot. We can simplify the code even more by simply allowing access only to the real PCIe card. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Stefan Roese <sr@denx.de> Cc: Phil Sutter <phil@nwl.cc> Cc: Mario Six <mario.six@gdsys.cc> Cc: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de>
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@ -79,7 +79,8 @@ struct mvebu_pcie {
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u32 lane;
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int devfn;
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u32 lane_mask;
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pci_dev_t dev;
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int first_busno;
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int local_dev;
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char name[16];
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unsigned int mem_target;
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unsigned int mem_attr;
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@ -144,27 +145,36 @@ static inline struct mvebu_pcie *hose_to_pcie(struct pci_controller *hose)
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return container_of(hose, struct mvebu_pcie, hose);
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}
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static int mvebu_pcie_valid_addr(struct mvebu_pcie *pcie, pci_dev_t bdf)
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{
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/*
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* There are two devices visible on local bus:
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* * on slot configured by function mvebu_pcie_set_local_dev_nr()
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* (by default this register is set to 0) there is a
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* "Marvell Memory controller", which isn't useful in root complex
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* mode,
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* * on all other slots the real PCIe card connected to the PCIe slot.
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*
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* We therefore allow access only to the real PCIe card.
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*/
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if (PCI_BUS(bdf) == pcie->first_busno &&
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PCI_DEV(bdf) != !pcie->local_dev)
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return 0;
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return 1;
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}
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static int mvebu_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
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uint offset, ulong *valuep,
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enum pci_size_t size)
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{
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struct mvebu_pcie *pcie = dev_get_plat(bus);
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int local_bus = PCI_BUS(pcie->dev);
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int local_dev = PCI_DEV(pcie->dev);
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u32 data;
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debug("PCIE CFG read: loc_bus=%d loc_dev=%d (b,d,f)=(%2d,%2d,%2d) ",
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local_bus, local_dev, PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
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debug("PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
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/* Don't access the local host controller via this API */
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if (PCI_BUS(bdf) == local_bus && PCI_DEV(bdf) == local_dev) {
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debug("- skipping host controller\n");
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*valuep = pci_get_ff(size);
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return 0;
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}
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/* If local dev is 0, the first other dev can only be 1 */
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if (PCI_BUS(bdf) == local_bus && local_dev == 0 && PCI_DEV(bdf) != 1) {
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if (!mvebu_pcie_valid_addr(pcie, bdf)) {
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debug("- out of range\n");
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*valuep = pci_get_ff(size);
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return 0;
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@ -186,22 +196,13 @@ static int mvebu_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
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enum pci_size_t size)
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{
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struct mvebu_pcie *pcie = dev_get_plat(bus);
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int local_bus = PCI_BUS(pcie->dev);
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int local_dev = PCI_DEV(pcie->dev);
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u32 data;
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debug("PCIE CFG write: loc_bus=%d loc_dev=%d (b,d,f)=(%2d,%2d,%2d) ",
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local_bus, local_dev, PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
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debug("PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ",
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PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
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debug("(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", offset, size, value);
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/* Don't access the local host controller via this API */
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if (PCI_BUS(bdf) == local_bus && PCI_DEV(bdf) == local_dev) {
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debug("- skipping host controller\n");
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return 0;
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}
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/* If local dev is 0, the first other dev can only be 1 */
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if (PCI_BUS(bdf) == local_bus && local_dev == 0 && PCI_DEV(bdf) != 1) {
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if (!mvebu_pcie_valid_addr(pcie, bdf)) {
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debug("- out of range\n");
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return 0;
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}
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@ -287,9 +288,11 @@ static int mvebu_pcie_probe(struct udevice *dev)
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readl(pcie->base), mvebu_pcie_get_local_bus_nr(pcie),
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mvebu_pcie_get_local_dev_nr(pcie));
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pcie->first_busno = bus;
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pcie->local_dev = 0;
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mvebu_pcie_set_local_bus_nr(pcie, bus);
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mvebu_pcie_set_local_dev_nr(pcie, 0);
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pcie->dev = PCI_BDF(bus, 0, 0);
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mvebu_pcie_set_local_dev_nr(pcie, pcie->local_dev);
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pcie->mem.start = (u32)mvebu_pcie_membase;
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pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1;
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