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https://github.com/brain-hackers/u-boot-brain
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- rk spi transfer limit fix - Gigadevice, gd25q128 support - spi-nor-core warnings
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commit
1058bc5ccc
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@ -546,6 +546,9 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
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dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr,
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(long long)instr->len);
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if (!instr->len)
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return 0;
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div_u64_rem(instr->len, mtd->erasesize, &rem);
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if (rem)
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return -EINVAL;
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@ -1226,6 +1229,9 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
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dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
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if (!len)
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return 0;
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for (i = 0; i < len; ) {
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ssize_t written;
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loff_t addr = to + i;
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@ -107,6 +107,11 @@ const struct flash_info spi_nor_ids[] = {
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SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
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},
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{
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INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
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SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
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},
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{
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INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
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SECT_4K | SPI_NOR_DUAL_READ |
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@ -27,6 +27,12 @@
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/* Change to 1 to output registers at the start of each transaction */
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#define DEBUG_RK_SPI 0
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/*
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* ctrlr1 is 16-bits, so we should support lengths of 0xffff + 1. However,
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* the controller seems to hang when given 0x10000, so stick with this for now.
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*/
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#define ROCKCHIP_SPI_MAX_TRANLEN 0xffff
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struct rockchip_spi_params {
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/* RXFIFO overruns and TXFIFO underruns stop the master clock */
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bool master_manages_fifo;
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@ -367,7 +373,7 @@ static inline int rockchip_spi_16bit_reader(struct udevice *dev,
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* represented in CTRLR1.
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*/
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if (data && data->master_manages_fifo)
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max_chunk_size = 0x10000;
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max_chunk_size = ROCKCHIP_SPI_MAX_TRANLEN;
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// rockchip_spi_configure(dev, mode, size)
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rkspi_enable_chip(regs, false);
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@ -451,7 +457,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
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/* This is the original 8bit reader/writer code */
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while (len > 0) {
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int todo = min(len, 0x10000);
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int todo = min(len, ROCKCHIP_SPI_MAX_TRANLEN);
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rkspi_enable_chip(regs, false);
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writel(todo - 1, ®s->ctrlr1);
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