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https://github.com/brain-hackers/u-boot-brain
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85xx: Add basic e500mc core support
Introduce CONFIG_E500MC to deal with the minor differences between e500v2 and e500mc. * Certain fields of HID0/1 don't exist anymore on e500mc * Cache line size is 64-bytes on e500mc * reset value of PIR is different Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -134,6 +134,10 @@ int checkcpu (void)
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puts("Unknown");
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puts("Unknown");
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break;
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break;
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}
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}
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if (PVR_MEM(pvr) == 0x03)
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puts("MC");
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
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printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
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get_sys_info(&sysinfo);
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get_sys_info(&sysinfo);
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@ -24,14 +24,18 @@
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__secondary_start_page:
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__secondary_start_page:
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/* First do some preliminary setup */
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/* First do some preliminary setup */
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lis r3, HID0_EMCP@h /* enable machine check */
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lis r3, HID0_EMCP@h /* enable machine check */
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#ifndef CONFIG_E500MC
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ori r3,r3,HID0_TBEN@l /* enable Timebase */
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ori r3,r3,HID0_TBEN@l /* enable Timebase */
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#endif
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#ifdef CONFIG_PHYS_64BIT
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#ifdef CONFIG_PHYS_64BIT
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ori r3,r3,HID0_ENMAS7@l /* enable MAS7 updates */
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ori r3,r3,HID0_ENMAS7@l /* enable MAS7 updates */
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#endif
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#endif
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mtspr SPRN_HID0,r3
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mtspr SPRN_HID0,r3
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#ifndef CONFIG_E500MC
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li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
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li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
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mtspr SPRN_HID1,r3
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mtspr SPRN_HID1,r3
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#endif
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/* Enable branch prediction */
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/* Enable branch prediction */
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li r3,0x201
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li r3,0x201
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@ -64,7 +68,11 @@ __secondary_start_page:
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/* r10 has the base address for the entry */
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/* r10 has the base address for the entry */
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mfspr r0,SPRN_PIR
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mfspr r0,SPRN_PIR
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#ifdef CONFIG_E500MC
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rlwinm r4,r0,27,27,31
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#else
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mr r4,r0
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mr r4,r0
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#endif
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slwi r8,r4,5
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slwi r8,r4,5
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add r10,r3,r8
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add r10,r3,r8
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@ -163,8 +163,10 @@ _start_e500:
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ori r0,r0,HID0_TBEN@l /* Enable Timebase */
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ori r0,r0,HID0_TBEN@l /* Enable Timebase */
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mtspr HID0,r0
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mtspr HID0,r0
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#ifndef CONFIG_E500MC
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li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
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li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
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mtspr HID1,r0
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mtspr HID1,r0
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#endif
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/* Enable Branch Prediction */
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/* Enable Branch Prediction */
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#if defined(CONFIG_BTB)
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#if defined(CONFIG_BTB)
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@ -12,6 +12,8 @@
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#define L1_CACHE_SHIFT 4
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#define L1_CACHE_SHIFT 4
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#elif defined(CONFIG_PPC64BRIDGE)
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#elif defined(CONFIG_PPC64BRIDGE)
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#define L1_CACHE_SHIFT 7
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#define L1_CACHE_SHIFT 7
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#elif defined(CONFIG_E500MC)
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#define L1_CACHE_SHIFT 6
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#else
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#else
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#define L1_CACHE_SHIFT 5
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#define L1_CACHE_SHIFT 5
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#endif
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#endif
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