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arm: socfpga: spl: add board_init_f to SPL
Remap SDRAM to 0x0, and clear OCRAM's ECC in board_init_f(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
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@ -6,6 +6,7 @@
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#include <common.h>
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#include <common.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/pl310.h>
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#include <asm/u-boot.h>
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#include <asm/u-boot.h>
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#include <asm/utils.h>
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#include <asm/utils.h>
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#include <image.h>
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#include <image.h>
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@ -19,6 +20,9 @@
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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static struct pl310_regs *const pl310 =
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(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
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#define MAIN_VCO_BASE ( \
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#define MAIN_VCO_BASE ( \
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(CONFIG_HPS_MAINPLLGRP_VCO_DENOM << \
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(CONFIG_HPS_MAINPLLGRP_VCO_DENOM << \
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CLKMGR_MAINPLLGRP_VCO_DENOM_OFFSET) | \
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CLKMGR_MAINPLLGRP_VCO_DENOM_OFFSET) | \
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@ -44,6 +48,31 @@ DECLARE_GLOBAL_DATA_PTR;
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CLKMGR_SDRPLLGRP_VCO_NUMER_OFFSET) \
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CLKMGR_SDRPLLGRP_VCO_NUMER_OFFSET) \
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)
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)
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void board_init_f(ulong dummy)
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{
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struct socfpga_system_manager *sysmgr_regs =
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(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
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unsigned long reg;
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/*
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* First C code to run. Clear fake OCRAM ECC first as SBE
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* and DBE might triggered during power on
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*/
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reg = readl(&sysmgr_regs->eccgrp_ocram);
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if (reg & SYSMGR_ECC_OCRAM_SERR)
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writel(SYSMGR_ECC_OCRAM_SERR | SYSMGR_ECC_OCRAM_EN,
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&sysmgr_regs->eccgrp_ocram);
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if (reg & SYSMGR_ECC_OCRAM_DERR)
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writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN,
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&sysmgr_regs->eccgrp_ocram);
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* Remap SDRAM to 0x0 */
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writel(0x1, &pl310->pl310_addr_filter_start);
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board_init_r(NULL, 0);
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}
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u32 spl_boot_device(void)
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u32 spl_boot_device(void)
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{
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{
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return BOOT_DEVICE_RAM;
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return BOOT_DEVICE_RAM;
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