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Exynos: Split 5250 and 5420 memory bank configuration
Since snow has a different memory configuration than peach, split the configuration between the 5250 and 5420. Exynos 5420 supports runtime memory configuration detection, and can make the determination between 4 and 7 banks at runtime. Include the bank size with the number of banks for context to make the number of banks meaningful. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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@ -161,8 +161,6 @@
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#define CONFIG_RD_LVL
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#define CONFIG_RD_LVL
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#define CONFIG_NR_DRAM_BANKS 8
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
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#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
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#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
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@ -65,4 +65,9 @@
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#define LCD_YRES 1600
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#define LCD_YRES 1600
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#define LCD_BPP LCD_COLOR16
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#define LCD_BPP LCD_COLOR16
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#endif
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#endif
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/* DRAM Memory Banks */
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#define CONFIG_NR_DRAM_BANKS 8
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#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
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#endif /* __CONFIG_5250_H */
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#endif /* __CONFIG_5250_H */
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@ -45,4 +45,8 @@
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*/
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*/
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
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/* DRAM Memory Banks */
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#define CONFIG_NR_DRAM_BANKS 7
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#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
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#endif /* __CONFIG_EXYNOS5420_H */
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#endif /* __CONFIG_EXYNOS5420_H */
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