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spl: at91: add support for SPL_AT91_MCK_BYPASS

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By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.

Also created Kconfig for this specific configuration.
By default this is disabled.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This commit is contained in:
Eugen Hristev 2019-05-24 09:38:10 +03:00
parent cd60ea71f3
commit 0be07872e3
2 changed files with 20 additions and 0 deletions
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8
arch/arm/mach-at91/spl_atmel.c
View File

@ -44,7 +44,15 @@ static void switch_to_main_crystal_osc(void)
#endif
tmp = readl(&pmc->mor);
/*
* some boards have an external oscillator with driving.
* in this case we need to disable the internal SoC driving (bypass mode)
*/
#if defined(CONFIG_SPL_AT91_MCK_BYPASS)
tmp |= AT91_PMC_MOR_OSCBYPASS;
#else
tmp &= ~AT91_PMC_MOR_OSCBYPASS;
#endif
tmp &= ~AT91_PMC_MOR_KEY(0xff);
tmp |= AT91_PMC_MOR_KEY(0x37);
writel(tmp, &pmc->mor);

12
common/spl/Kconfig
View File

@ -1151,5 +1151,17 @@ config TPL_YMODEM_SUPPORT
endif # TPL
config SPL_AT91_MCK_BYPASS
bool "Use external clock signal as a source of main clock for AT91 platforms"
depends on ARCH_AT91
default n
help
Use external 8 to 24 Mhz clock signal as source of main clock instead
of an external crystal oscillator.
This option disables the internal driving on the XOUT pin.
The external source has to provide a stable clock on the XIN pin.
If this option is disabled, the SoC expects a crystal oscillator
that needs driving on both XIN and XOUT lines.
endif # SPL
endmenu