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arm: socfpga: move vining_fpga to DM_I2C 

All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 2
- added (this) patch to move socfpga_vining to DM_I2C
This commit is contained in:
Simon Goldschmidt 2019-03-28 22:09:35 +01:00 committed by Marek Vasut
parent 9dc61aac2d
commit 0b7eb4337d
4 changed files with 8 additions and 44 deletions
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9
board/samtec/vining_fpga/socfpga.c
View File

@ -52,14 +52,7 @@ int misc_init_r(void)
u32 serial;
int ret;
/* EEPROM is at bus 0. */
ret = i2c_set_bus_num(0);
if (ret) {
puts("Cannot select EEPROM I2C bus.\n");
return 0;
}
/* EEPROM is at address 0x50. */
/* EEPROM is at address 0x50 (at bus CONFIG_SYS_EEPROM_BUS_NUM). */
ret = eeprom_read(0x50, 0, data, sizeof(data));
if (ret) {
puts("Cannot read I2C EEPROM.\n");

8
configs/socfpga_vining_fpga_defconfig
View File

@ -16,8 +16,8 @@ CONFIG_VERSION_VARIABLE=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_SPI_LOAD=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
@ -44,6 +44,7 @@ CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_DM_I2C=y
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS_GPIO=y
CONFIG_LED_STATUS0=y
@ -55,6 +56,11 @@ CONFIG_LED_STATUS_BIT2=54
CONFIG_LED_STATUS3=y
CONFIG_LED_STATUS_BIT3=65
CONFIG_LED_STATUS_CMD=y
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=70
CONFIG_DM_MMC=y
CONFIG_MMC_DW=y
CONFIG_MTD_DEVICE=y

26
include/configs/socfpga_common.h
View File

@ -149,32 +149,6 @@
#define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS
#endif
/*
* I2C support
*/
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS
#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS
#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS
#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS
/* Using standard mode which the speed up to 100Kb/s */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SPEED1 100000
#define CONFIG_SYS_I2C_SPEED2 100000
#define CONFIG_SYS_I2C_SPEED3 100000
/* Address of device when used as slave */
#define CONFIG_SYS_I2C_SLAVE 0x02
#define CONFIG_SYS_I2C_SLAVE1 0x02
#define CONFIG_SYS_I2C_SLAVE2 0x02
#define CONFIG_SYS_I2C_SLAVE3 0x02
#ifndef __ASSEMBLY__
/* Clock supplied to I2C controller in unit of MHz */
unsigned int cm_get_l4_sp_clk_hz(void);
#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000)
#endif
#endif /* CONFIG_DM_I2C */
/*
* QSPI support
*/

9
include/configs/socfpga_vining_fpga.h
View File

@ -16,15 +16,6 @@
#define CONFIG_LOADADDR 0x01000000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
/* I2C EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
#endif
/*
* Status LEDs:
* 0 ... Top Green