brain-hackers_pepepper-mirror
/
u-boot-brain
mirror of https://github.com/brain-hackers/u-boot-brain
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

net: eepro100: Remove EEPRO100_SROM_WRITE 

This code is never enabled, last board that used it was ELPPC which
was removed some 5 years ago, so just remove this code altogether.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This commit is contained in:
Marek Vasut 2020-05-23 13:06:48 +02:00
parent 7a81989b7b
commit 0a5be6c5fd
3 changed files with 0 additions and 90 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README
View File

@ -891,8 +891,6 @@ The following options need to be configured:
CONFIG_EEPRO100
Support for Intel 82557/82559/82559ER chips.
Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
write routine for first time initialisation.
CONFIG_TULIP
Support for Digital 2114x chips.

87
drivers/net/eepro100.c
View File

@ -781,93 +781,6 @@ static int read_eeprom (struct eth_device *dev, int location, int addr_len)
return retval;
}
#ifdef CONFIG_EEPRO100_SROM_WRITE
int eepro100_write_eeprom (struct eth_device* dev, int location, int addr_len, unsigned short data)
{
unsigned short dataval;
int enable_cmd = 0x3f | EE_EWENB_CMD;
int write_cmd = location | EE_WRITE_CMD;
int i;
unsigned long datalong, tmplong;
OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB, SCBeeprom);
/* Shift the enable command bits out. */
for (i = (addr_len+EE_CMD_BITS-1); i >= 0; i--)
{
dataval = (enable_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
OUTW(dev, EE_ENB | dataval, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
udelay(1);
}
OUTW(dev, EE_ENB, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB, SCBeeprom);
/* Shift the write command bits out. */
for (i = (addr_len+EE_CMD_BITS-1); i >= 0; i--)
{
dataval = (write_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
OUTW(dev, EE_ENB | dataval, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
udelay(1);
}
/* Write the data */
datalong= (unsigned long) ((((data) & 0x00ff) << 8) | ( (data) >> 8));
for (i = 0; i< EE_DATA_BITS; i++)
{
/* Extract and move data bit to bit DI */
dataval = ((datalong & 0x8000)>>13) ? EE_DATA_WRITE : 0;
OUTW(dev, EE_ENB | dataval, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
udelay(1);
OUTW(dev, EE_ENB | dataval, SCBeeprom);
udelay(1);
datalong = datalong << 1; /* Adjust significant data bit*/
}
/* Finish up command (toggle CS) */
OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
udelay(1); /* delay for more than 250 ns */
OUTW(dev, EE_ENB, SCBeeprom);
/* Wait for programming ready (D0 = 1) */
tmplong = 10;
do
{
dataval = INW(dev, SCBeeprom);
if (dataval & EE_DATA_READ)
break;
udelay(10000);
}
while (-- tmplong);
if (tmplong == 0)
{
printf ("Write i82559 eeprom timed out (100 ms waiting for data ready.\n");
return -1;
}
/* Terminate the EEPROM access. */
OUTW(dev, EE_ENB & ~EE_CS, SCBeeprom);
return 0;
}
#endif
static void init_rx_ring (struct eth_device *dev)
{
int i;

1
scripts/config_whitelist.txt
View File

@ -400,7 +400,6 @@ CONFIG_EDB93XX_SDCS1
CONFIG_EDB93XX_SDCS2
CONFIG_EDB93XX_SDCS3
CONFIG_EEPRO100
CONFIG_EEPRO100_SROM_WRITE
CONFIG_EFLASH_PROTSECTORS
CONFIG_EHCI_DESC_BIG_ENDIAN
CONFIG_EHCI_HCD_INIT_AFTER_RESET