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ARM: uniphier: sync with Linux 5.8-rc4

Browse Source 
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2020-07-09 15:08:14 +09:00
parent 56d463bdba
commit 0852033309
18 changed files with 172 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/dts/uniphier-ld11-global.dts
View File

@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

1
arch/arm/dts/uniphier-ld11-ref.dts
View File

@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

16
arch/arm/dts/uniphier-ld11.dtsi
View File

@ -129,6 +129,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -140,11 +142,13 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
@ -566,6 +570,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc20000 0x200>;

1
arch/arm/dts/uniphier-ld20-global.dts
View File

@ -30,6 +30,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

1
arch/arm/dts/uniphier-ld20-ref.dts
View File

@ -29,6 +29,7 @@
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
ethernet0 = &eth;
};
memory@80000000 {

28
arch/arm/dts/uniphier-ld20.dtsi
View File

@ -234,6 +234,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -245,33 +247,39 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
spi2: spi@54006200 {
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006200 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 229 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 13>;
resets = <&peri_rst 13>;
};
spi3: spi@54006300 {
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006300 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 230 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi3>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 14>;
resets = <&peri_rst 14>;
};
serial0: serial@54006800 {
@ -664,6 +672,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc20000 0x200>;

2
arch/arm/dts/uniphier-ld4.dtsi
View File

@ -67,6 +67,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;

1
arch/arm/dts/uniphier-ld6b-ref.dts
View File

@ -29,6 +29,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
ethernet0 = &eth;
};
memory@80000000 {

1
arch/arm/dts/uniphier-pro4-ace.dts
View File

@ -26,6 +26,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
ethernet0 = &eth;
};
memory@80000000 {

1
arch/arm/dts/uniphier-pro4-ref.dts
View File

@ -30,6 +30,7 @@
i2c5 = &i2c5;
i2c6 = &i2c6;
usb0 = &usb0;
ethernet0 = &eth;
};
memory@80000000 {

10
arch/arm/dts/uniphier-pro4.dtsi
View File

@ -75,6 +75,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -426,6 +428,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pro4-aidet";
reg = <0x5fc20000 0x200>;

16
arch/arm/dts/uniphier-pro5.dtsi
View File

@ -160,6 +160,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -171,11 +173,13 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 11>; /* common with spi0 */
resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
@ -408,6 +412,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pro5-aidet";
reg = <0x5fc20000 0x200>;

1
arch/arm/dts/uniphier-pxs2-gentil.dts
View File

@ -26,6 +26,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
ethernet0 = &eth;
};
memory@80000000 {

1
arch/arm/dts/uniphier-pxs2-vodka.dts
View File

@ -24,6 +24,7 @@
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
ethernet0 = &eth;
};
memory@80000000 {

16
arch/arm/dts/uniphier-pxs2.dtsi
View File

@ -173,6 +173,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -184,11 +186,13 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
@ -508,6 +512,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pxs2-aidet";
reg = <0x5fc20000 0x200>;

28
arch/arm/dts/uniphier-pxs3-ref.dts
View File

@ -27,6 +27,10 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c6 = &i2c6;
spi0 = &spi0;
spi1 = &spi1;
ethernet0 = &eth0;
ethernet1 = &eth1;
};
memory@80000000 {
@ -39,6 +43,14 @@
interrupts = <4 8>;
};
&spi0 {
status = "okay";
};
&spi1 {
status = "okay";
};
&serial0 {
status = "okay";
};
@ -116,3 +128,19 @@
&nand {
status = "okay";
};
&pinctrl_ether_rgmii {
tx {
pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1",
"RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL";
drive-strength = <9>;
};
};
&pinctrl_ether1_rgmii {
tx {
pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1",
"RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL";
drive-strength = <9>;
};
};

59
arch/arm/dts/uniphier-pxs3.dtsi
View File

@ -7,6 +7,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "socionext,uniphier-pxs3";
@ -42,6 +43,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@ -51,6 +53,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
@ -60,6 +63,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
@ -69,6 +73,7 @@
clocks = <&sys_clk 33>;
enable-method = "psci";
operating-points-v2 = <&cluster0_opp>;
#cooling-cells = <2>;
};
};
@ -136,6 +141,37 @@
<1 10 4>;
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <250>; /* 250ms */
polling-delay = <1000>; /* 1000ms */
thermal-sensors = <&pvtctl>;
trips {
cpu_crit: cpu-crit {
temperature = <110000>; /* 110C */
hysteresis = <2000>;
type = "critical";
};
cpu_alert: cpu-alert {
temperature = <100000>; /* 100C */
hysteresis = <2000>;
type = "passive";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@ -157,6 +193,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
@ -168,11 +206,13 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006100 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 216 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>;
resets = <&peri_rst 11>;
clocks = <&peri_clk 12>;
resets = <&peri_rst 12>;
};
serial0: serial@54006800 {
@ -462,6 +502,14 @@
};
};
xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>;
dma-channels = <16>;
#dma-cells = <2>;
};
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pxs3-aidet";
reg = <0x5fc20000 0x200>;
@ -496,6 +544,13 @@
watchdog {
compatible = "socionext,uniphier-wdt";
};
pvtctl: pvtctl {
compatible = "socionext,uniphier-pxs3-thermal";
interrupts = <0 3 4>;
#thermal-sensor-cells = <0>;
socionext,tmod-calibration = <0x0f22 0x68ee>;
};
};
eth0: ethernet@65000000 {

2
arch/arm/dts/uniphier-sld8.dtsi
View File

@ -67,6 +67,8 @@
compatible = "socionext,uniphier-scssi";
status = "disabled";
reg = <0x54006000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 39 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;