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arm: mx6: ddr: configure MMDC for slow_pd
According to MX6 TRM, both MMDC and DRAM should be configured to the same powerdown precharge. Currently, mx6_dram_cfg() configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for 'slow exit (DLL off)' (MR0[12] = 0). Configure MMDC for slow pd. Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Tim Harvey <tharvey@gateworks.com>
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@ -469,6 +469,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
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mmdc0->mdpdc = (tcke & 0x7) << 16 |
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mmdc0->mdpdc = (tcke & 0x7) << 16 |
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5 << 12 | /* PWDT_1: 256 cycles */
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5 << 12 | /* PWDT_1: 256 cycles */
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5 << 8 | /* PWDT_0: 256 cycles */
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5 << 8 | /* PWDT_0: 256 cycles */
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1 << 7 | /* SLOW_PD */
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1 << 6 | /* BOTH_CS_PD */
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1 << 6 | /* BOTH_CS_PD */
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(tcksrx & 0x7) << 3 |
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(tcksrx & 0x7) << 3 |
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(tcksre & 0x7);
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(tcksre & 0x7);
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