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arm: socfpga: spl: enable sdram, timer and uart

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Add the calls in the spl_board_init to enable SDRAM, timer, and UART.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Dinh Nguyen 2015-03-30 17:01:05 -05:00 committed by Marek Vasut
parent c218f85ea1
commit 0812a1d3e5
1 changed files with 4 additions and 0 deletions
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4
arch/arm/cpu/armv7/socfpga/spl.c
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@ -144,6 +144,10 @@ void spl_board_init(void)
/* freeze all IO banks */
sys_mgr_frzctrl_freeze_req();
socfpga_sdram_enable();
socfpga_uart0_enable();
socfpga_osc1timer_enable();
debug("Reconfigure Clock Manager\n");
/* reconfigure the PLLs */
cm_basic_init(&cm_default_cfg);