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powerpc/mpc85xx: Serdes protocol "00" is supported

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"0x00" is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.

Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Ebony Zhu 2014-09-04 11:53:00 -05:00 committed by York Sun
parent 1de271b487
commit 07c4eea484
1 changed files with 0 additions and 5 deletions
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5
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
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@ -186,11 +186,6 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
#endif
cfg = in_be32(&gur->rcwsr[4]) & sd_prctl_mask;
/* Is serdes enabled at all? */
if (!cfg) {
printf("SERDES%d is not enabled\n", sd + 1);
return 0;
}
/* Erratum A-007186
* Freescale Scratch Pad Fuse Register n (SFP_FSPFR0)