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ram: rockchip: debug: Add sdram_print_ddr_info
Add sdram ddr info print support, this would help to observe the sdram base parameters. Here is sample print on LPDDR4, 50MHz channel 0 BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: YouMin Chen <cym@rock-chips.com> Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
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@ -97,8 +97,15 @@ int dram_init(void);
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inline void sdram_print_dram_type(unsigned char dramtype)
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inline void sdram_print_dram_type(unsigned char dramtype)
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{
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{
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}
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}
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inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
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struct sdram_base_params *base)
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{
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}
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#else
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#else
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void sdram_print_dram_type(unsigned char dramtype);
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void sdram_print_dram_type(unsigned char dramtype);
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void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
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struct sdram_base_params *base);
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#endif /* CONFIG_RAM_ROCKCHIP_DEBUG */
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#endif /* CONFIG_RAM_ROCKCHIP_DEBUG */
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#endif
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#endif
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@ -32,3 +32,43 @@ void sdram_print_dram_type(unsigned char dramtype)
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break;
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break;
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}
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}
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}
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}
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void sdram_print_ddr_info(struct sdram_cap_info *cap_info,
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struct sdram_base_params *base)
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{
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u32 bg;
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bg = (cap_info->dbw == 0) ? 2 : 1;
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sdram_print_dram_type(base->dramtype);
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printascii(", ");
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printdec(base->ddr_freq);
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printascii("MHz\n");
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printascii("BW=");
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printdec(8 << cap_info->bw);
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printascii(" Col=");
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printdec(cap_info->col);
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printascii(" Bk=");
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printdec(0x1 << cap_info->bk);
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if (base->dramtype == DDR4) {
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printascii(" BG=");
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printdec(1 << bg);
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}
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printascii(" CS0 Row=");
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printdec(cap_info->cs0_row);
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if (cap_info->rank > 1) {
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printascii(" CS1 Row=");
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printdec(cap_info->cs1_row);
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}
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printascii(" CS=");
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printdec(cap_info->rank);
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printascii(" Die BW=");
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printdec(8 << cap_info->dbw);
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}
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