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ARM: tegra: Restrict usable RAM to 32-bit on 64-bit SoCs
Most peripherals on Tegra can do DMA only to the lower 32-bit address space, even on 64-bit SoCs. This limitation is typically overcome by the use of an IOMMU. Since the IOMMU is not entirely trivial to set up and serves no other purpose (I/O protection, ...) in U-Boot, restrict 64-bit Tegra SoCs to the lower 32-bit address space for RAM. This ensures that the physical addresses of buffers that are programmed into the various DMA engines are valid and don't alias to lower addresses. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -274,3 +274,19 @@ void pad_init_mmc(struct mmc_host *host)
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#endif /* T30 */
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#endif /* T30 */
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}
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}
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#endif /* MMC */
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#endif /* MMC */
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#ifdef CONFIG_ARM64
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/*
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* Most hardware on 64-bit Tegra is still restricted to DMA to the lower
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* 32-bits of the physical address space. Cap the maximum usable RAM area
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* at 4 GiB to avoid DMA buffers from being allocated beyond the 32-bit
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* boundary that most devices can address.
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*/
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ulong board_get_usable_ram_top(ulong total_size)
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{
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if (gd->ram_top > 0x100000000)
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return 0x100000000;
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return gd->ram_top;
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}
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#endif
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