brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-07-09 20:56:16 +09:00
Code Issues Projects Releases Wiki Activity

arm: exynos: clock: Remove exynos4x12_set_mmc_clk function

Browse Source 
exynos4x12_set_mmc_clk function have been removed.
Because, exynos4x12_clock and exynos4_clock return same div_fsys* value.

Signed-off-by: Beomho Seo <beomho.seo@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Beomho Seo 2014-05-16 13:59:47 +09:00 committed by Minkyu Kang
parent 77ee62d882
commit 00ee81300f
1 changed files with 1 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
arch/arm/cpu/armv7/exynos/clock.c
View File

@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div)
(div & 0xff) << ((dev_index << 4) + 8));
}
/* exynos4x12: set the mmc clock */
static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div)
{
struct exynos4x12_clock *clk =
(struct exynos4x12_clock *)samsung_get_base_clock();
unsigned int addr;
/*
* CLK_DIV_FSYS1
* MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
* CLK_DIV_FSYS2
* MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
*/
if (dev_index < 2) {
addr = (unsigned int)&clk->div_fsys1;
} else {
addr = (unsigned int)&clk->div_fsys2;
dev_index -= 2;
}
clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8),
(div & 0xff) << ((dev_index << 4) + 8));
}
/* exynos5: set the mmc clock */
static void exynos5_set_mmc_clk(int dev_index, unsigned int div)
{
@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div)
else
exynos5_set_mmc_clk(dev_index, div);
} else {
if (proid_is_exynos4412())
exynos4x12_set_mmc_clk(dev_index, div);
else
exynos4_set_mmc_clk(dev_index, div);
exynos4_set_mmc_clk(dev_index, div);
}
}