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rockchip: rk3399: update SPL_STACK_R_ADDR
Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config; default to 0x4000000(64MB) instead of 0x80000(512KB) for this address can support all the SoCs including those may have only 64MB memory, and also reserve enough space for atf, kernel(in falcon mode) loading. After the ATF entry move to 0x40000, the stack from 0x80000 may be override when loading ATF bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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4b294886d0
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006ab58d46
@ -91,6 +91,9 @@ config TPL_STACK
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config TPL_TEXT_BASE
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default 0xff8c2000
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config SPL_STACK_R_ADDR
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default 0x04000000
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source "board/rockchip/evb_rk3399/Kconfig"
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source "board/theobroma-systems/puma_rk3399/Kconfig"
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source "board/vamrs/rock960_rk3399/Kconfig"
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@ -8,7 +8,6 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
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# CONFIG_SPL_MMC_SUPPORT is not set
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CONFIG_TARGET_CHROMEBOOK_BOB=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xff1a0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
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CONFIG_TARGET_ROCK960_RK3399=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -6,7 +6,6 @@ CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
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CONFIG_TARGET_PUMA_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF180000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
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CONFIG_TARGET_ROCK960_RK3399=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3399=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_DEBUG_UART_BASE=0xFF1A0000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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