mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-08 05:43:21 +09:00
641 lines
15 KiB
Plaintext
641 lines
15 KiB
Plaintext
![]() |
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* Support for imx6 based Advantech DMS-BA16 Qseven module
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*
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* Copyright 2015 Timesys Corporation.
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* Copyright 2015 General Electric Company
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "imx6q.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0x40000000>;
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};
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backlight_lvds: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_display>;
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pwms = <&pwm1 0 5000000>;
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brightness-levels = < 0 1 2 3 4 5 6 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100 101 102 103 104 105 106 107 108 109
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110 111 112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127 128 129
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130 131 132 133 134 135 136 137 138 139
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140 141 142 143 144 145 146 147 148 149
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150 151 152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167 168 169
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170 171 172 173 174 175 176 177 178 179
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180 181 182 183 184 185 186 187 188 189
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190 191 192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207 208 209
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210 211 212 213 214 215 216 217 218 219
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220 221 222 223 224 225 226 227 228 229
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230 231 232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247 248 249
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250 251 252 253 254 255>;
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default-brightness-level = <255>;
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enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_lvds: regulator-lvds {
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compatible = "regulator-fixed";
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regulator-name = "lvds_ppen";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_h1_vbus: regulator-usbh1vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_h1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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reg_usb_otg_vbus: regulator-usbotgvbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&ecspi1 {
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cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash: n25q032@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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reg = <0>;
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0xc0000>;
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};
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partition@c0000 {
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label = "env";
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reg = <0xc0000 0x10000>;
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};
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partition@d0000 {
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label = "spare";
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reg = <0xd0000 0x320000>;
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};
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partition@3f0000 {
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label = "mfg";
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reg = <0x3f0000 0x10000>;
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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pmic@58 {
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compatible = "dlg,da9063";
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reg = <0x58>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pmic>;
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interrupt-parent = <&gpio7>;
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interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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onkey {
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compatible = "dlg,da9063-onkey";
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};
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regulators {
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vdd_bcore1: bcore1 {
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regulator-min-microvolt = <1420000>;
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regulator-max-microvolt = <1420000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_bcore2: bcore2 {
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regulator-min-microvolt = <1420000>;
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regulator-max-microvolt = <1420000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_bpro: bpro {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_bmem: bmem {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_bio: bio {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_bperi: bperi {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_ldo1: ldo1 {
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1860000>;
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};
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vdd_ldo2: ldo2 {
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regulator-min-microvolt = <600000>;
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regulator-max-microvolt = <1860000>;
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};
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vdd_ldo3: ldo3 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3440000>;
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};
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vdd_ldo4: ldo4 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3440000>;
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};
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vdd_ldo5: ldo5 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3600000>;
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};
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vdd_ldo6: ldo6 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3600000>;
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};
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vdd_ldo7: ldo7 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3600000>;
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};
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vdd_ldo8: ldo8 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3600000>;
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};
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vdd_ldo9: ldo9 {
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <3600000>;
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};
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vdd_ldo10: ldo10 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3600000>;
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};
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vdd_ldo11: ldo11 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <3600000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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rtc@32 {
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compatible = "epson,rx8010";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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reg = <0x32>;
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interrupt-parent = <&gpio4>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
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fsl,tx-swing-full = <103>;
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fsl,tx-swing-low = <103>;
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status = "okay";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "okay";
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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status = "disabled";
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};
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&sata {
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status = "okay";
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};
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&ssi1 {
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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uart-has-rtscts;
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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&usbh1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbhub>;
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vbus-supply = <®_usb_h1_vbus>;
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reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&usbotg {
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vbus-supply = <®_usb_otg_vbus>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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disable-over-current;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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keep-power-in-suspend;
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wakeup-source;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
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bus-width = <8>;
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vmmc-supply = <&vdd_bperi>;
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non-removable;
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keep-power-in-suspend;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
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MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0
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MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
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MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
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>;
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};
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pinctrl_display: dispgrp {
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fsl,pins = <
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/* BLEN_OUT */
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MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
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/* LVDS_PPEN_OUT */
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
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/* SPI1 CS */
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||
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_ecspi5: ecspi5grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0
|
||
|
MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0
|
||
|
MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0
|
||
|
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_enet: enetgrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
|
||
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
|
||
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
|
||
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
|
||
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
|
||
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
|
||
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
||
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
||
|
/* FEC Reset */
|
||
|
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0
|
||
|
/* AR8033 Interrupt */
|
||
|
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_hog: hoggrp {
|
||
|
fsl,pins = <
|
||
|
/* GPIO 0-7 */
|
||
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
|
||
|
MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0
|
||
|
/* SUS_S3_OUT to CPLD */
|
||
|
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_i2c1: i2c1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
||
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_i2c2: i2c2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
||
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_i2c3: i2c3grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
||
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pcie: pciegrp {
|
||
|
fsl,pins = <
|
||
|
/* PCIe Reset */
|
||
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
||
|
/* PCIe Wake */
|
||
|
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pmic: pmicgrp {
|
||
|
fsl,pins = <
|
||
|
/* PMIC Interrupt */
|
||
|
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pwm1: pwm1grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_pwm2: pwm2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_rtc: rtcgrp {
|
||
|
fsl,pins = <
|
||
|
/* RTC_INT */
|
||
|
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart3: uart3grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
|
||
|
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_uart4: uart4grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
||
|
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usbhub: usbhubgrp {
|
||
|
fsl,pins = <
|
||
|
/* HUB_RESET */
|
||
|
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usbotg: usbotggrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc2: usdhc2grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
||
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
||
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
||
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
||
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
||
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
||
|
/* uSDHC2 CD */
|
||
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc3: usdhc3grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
||
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
||
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
|
||
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc3_reset: usdhc3grp-reset {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_usdhc4: usdhc4grp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
||
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
|
||
|
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
|
||
|
/* uSDHC4 CD */
|
||
|
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
|
||
|
/* uSDHC4 SDIO PWR */
|
||
|
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
|
||
|
/* uSDHC4 SDIO WP */
|
||
|
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
|
||
|
/* uSDHC4 SDIO LED */
|
||
|
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
|
||
|
pinctrl_wdog: wdoggrp {
|
||
|
fsl,pins = <
|
||
|
MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0
|
||
|
>;
|
||
|
};
|
||
|
};
|