u-boot-brain/configs/crownbay_defconfig

CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000"
CONFIG_X86=y
CONFIG_TARGET_CROWNBAY=y
CONFIG_OF_CONTROL=y
CONFIG_OF_SEPARATE=y
CONFIG_DEFAULT_DEVICE_TREE="crownbay"
CONFIG_GENERATE_PIRQ_TABLE=y
x86: Add crownbay defconfig and config.h Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2014-12-17 16:50:41 +09:00			`CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000"`
			`CONFIG_X86=y`
			`CONFIG_TARGET_CROWNBAY=y`
			`CONFIG_OF_CONTROL=y`
			`CONFIG_OF_SEPARATE=y`
			`CONFIG_DEFAULT_DEVICE_TREE="crownbay"`
x86: queensbay: Implement PIRQ routing Implement Intel Queensbay platform-specific PIRQ routing support. The chipset PIRQ routing setup is called in the arch_misc_init(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2015-04-24 19:10:06 +09:00			`CONFIG_GENERATE_PIRQ_TABLE=y`