2018-05-07 06:58:06 +09:00
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// SPDX-License-Identifier: GPL-2.0+
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2008-04-15 13:08:20 +09:00
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/*
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* SMSC LAN9[12]1[567] Network driver
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*
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2008-05-09 05:52:09 +09:00
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* (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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2008-04-15 13:08:20 +09:00
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*/
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#include <common.h>
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#include <command.h>
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2009-07-21 14:01:11 +09:00
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#include <malloc.h>
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2008-04-15 13:08:20 +09:00
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#include <net.h>
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#include <miiphy.h>
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2020-03-15 23:03:07 +09:00
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#include <linux/types.h>
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2008-04-15 13:08:20 +09:00
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2009-02-24 00:29:47 +09:00
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#include "smc911x.h"
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2008-04-15 13:08:20 +09:00
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2020-03-15 23:03:07 +09:00
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struct chip_id {
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u16 id;
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char *name;
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};
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static const struct chip_id chip_ids[] = {
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{ CHIP_89218, "LAN89218" },
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{ CHIP_9115, "LAN9115" },
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{ CHIP_9116, "LAN9116" },
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{ CHIP_9117, "LAN9117" },
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{ CHIP_9118, "LAN9118" },
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{ CHIP_9211, "LAN9211" },
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{ CHIP_9215, "LAN9215" },
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{ CHIP_9216, "LAN9216" },
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{ CHIP_9217, "LAN9217" },
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{ CHIP_9218, "LAN9218" },
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{ CHIP_9220, "LAN9220" },
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{ CHIP_9221, "LAN9221" },
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{ 0, NULL },
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};
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#define DRIVERNAME "smc911x"
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#if defined (CONFIG_SMC911X_32_BIT) && \
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defined (CONFIG_SMC911X_16_BIT)
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#error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
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CONFIG_SMC911X_16_BIT shall be set"
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#endif
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#if defined (CONFIG_SMC911X_32_BIT)
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static inline u32 __smc911x_reg_read(struct eth_device *dev, u32 offset)
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{
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return *(volatile u32*)(dev->iobase + offset);
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}
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u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
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__attribute__((weak, alias("__smc911x_reg_read")));
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static inline void __smc911x_reg_write(struct eth_device *dev,
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u32 offset, u32 val)
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{
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*(volatile u32*)(dev->iobase + offset) = val;
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}
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void smc911x_reg_write(struct eth_device *dev, u32 offset, u32 val)
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__attribute__((weak, alias("__smc911x_reg_write")));
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#elif defined (CONFIG_SMC911X_16_BIT)
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static inline u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
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{
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volatile u16 *addr_16 = (u16 *)(dev->iobase + offset);
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return ((*addr_16 & 0x0000ffff) | (*(addr_16 + 1) << 16));
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}
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static inline void smc911x_reg_write(struct eth_device *dev,
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u32 offset, u32 val)
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{
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*(volatile u16 *)(dev->iobase + offset) = (u16)val;
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*(volatile u16 *)(dev->iobase + offset + 2) = (u16)(val >> 16);
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}
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#else
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#error "SMC911X: undefined bus width"
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#endif /* CONFIG_SMC911X_16_BIT */
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static u32 smc911x_get_mac_csr(struct eth_device *dev, u8 reg)
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{
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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smc911x_reg_write(dev, MAC_CSR_CMD,
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MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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return smc911x_reg_read(dev, MAC_CSR_DATA);
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}
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static void smc911x_set_mac_csr(struct eth_device *dev, u8 reg, u32 data)
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{
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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smc911x_reg_write(dev, MAC_CSR_DATA, data);
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smc911x_reg_write(dev, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
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while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
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;
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}
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static int smc911x_detect_chip(struct eth_device *dev)
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{
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unsigned long val, i;
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val = smc911x_reg_read(dev, BYTE_TEST);
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if (val == 0xffffffff) {
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/* Special case -- no chip present */
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return -1;
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} else if (val != 0x87654321) {
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printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
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return -1;
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}
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val = smc911x_reg_read(dev, ID_REV) >> 16;
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for (i = 0; chip_ids[i].id != 0; i++) {
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if (chip_ids[i].id == val) break;
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}
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if (!chip_ids[i].id) {
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printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
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return -1;
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}
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dev->priv = (void *)&chip_ids[i];
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return 0;
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}
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static void smc911x_reset(struct eth_device *dev)
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{
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int timeout;
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/*
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* Take out of PM setting first
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* Device is already wake up if PMT_CTRL_READY bit is set
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*/
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if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0) {
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/* Write to the bytetest will take out of powerdown */
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smc911x_reg_write(dev, BYTE_TEST, 0x0);
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timeout = 10;
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while (timeout-- &&
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!(smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY))
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udelay(10);
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if (timeout < 0) {
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printf(DRIVERNAME
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": timeout waiting for PM restore\n");
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return;
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}
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}
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/* Disable interrupts */
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smc911x_reg_write(dev, INT_EN, 0);
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smc911x_reg_write(dev, HW_CFG, HW_CFG_SRST);
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timeout = 1000;
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while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)
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udelay(10);
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if (timeout < 0) {
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printf(DRIVERNAME ": reset timeout\n");
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return;
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}
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/* Reset the FIFO level and flow control settings */
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smc911x_set_mac_csr(dev, FLOW, FLOW_FCPT | FLOW_FCEN);
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smc911x_reg_write(dev, AFC_CFG, 0x0050287F);
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/* Set to LED outputs */
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smc911x_reg_write(dev, GPIO_CFG, 0x70070000);
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}
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2009-11-11 17:03:09 +09:00
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static void smc911x_handle_mac_address(struct eth_device *dev)
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2008-04-15 13:08:20 +09:00
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{
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unsigned long addrh, addrl;
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2009-07-21 14:01:11 +09:00
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uchar *m = dev->enetaddr;
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
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addrh = m[4] | (m[5] << 8);
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smc911x_set_mac_csr(dev, ADDRL, addrl);
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smc911x_set_mac_csr(dev, ADDRH, addrh);
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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printf(DRIVERNAME ": MAC %pM\n", m);
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2008-04-15 13:08:20 +09:00
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}
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2011-06-29 09:12:14 +09:00
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static int smc911x_eth_phy_read(struct eth_device *dev,
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2009-07-21 14:01:11 +09:00
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u8 phy, u8 reg, u16 *val)
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2008-04-15 13:08:20 +09:00
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{
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2009-07-21 14:01:11 +09:00
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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2008-04-29 21:35:08 +09:00
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;
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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smc911x_set_mac_csr(dev, MII_ACC, phy << 11 | reg << 6 |
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MII_ACC_MII_BUSY);
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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2008-04-29 21:35:08 +09:00
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;
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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*val = smc911x_get_mac_csr(dev, MII_DATA);
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2008-04-15 13:08:20 +09:00
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return 0;
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}
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2011-06-29 09:12:14 +09:00
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static int smc911x_eth_phy_write(struct eth_device *dev,
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2009-07-21 14:01:11 +09:00
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u8 phy, u8 reg, u16 val)
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2008-04-15 13:08:20 +09:00
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{
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2009-07-21 14:01:11 +09:00
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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2008-04-29 21:35:08 +09:00
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;
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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smc911x_set_mac_csr(dev, MII_DATA, val);
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smc911x_set_mac_csr(dev, MII_ACC,
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2008-04-15 13:08:20 +09:00
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phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
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2009-07-21 14:01:11 +09:00
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while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
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2008-04-29 21:35:08 +09:00
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;
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2008-04-15 13:08:20 +09:00
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return 0;
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}
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2009-07-21 14:01:11 +09:00
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static int smc911x_phy_reset(struct eth_device *dev)
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2008-04-15 13:08:20 +09:00
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{
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u32 reg;
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2009-07-21 14:01:11 +09:00
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reg = smc911x_reg_read(dev, PMT_CTRL);
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2008-04-15 13:08:20 +09:00
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reg &= ~0xfffff030;
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reg |= PMT_CTRL_PHY_RST;
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2009-07-21 14:01:11 +09:00
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smc911x_reg_write(dev, PMT_CTRL, reg);
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2008-04-15 13:08:20 +09:00
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mdelay(100);
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return 0;
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}
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2009-07-21 14:01:11 +09:00
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static void smc911x_phy_configure(struct eth_device *dev)
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2008-04-15 13:08:20 +09:00
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{
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int timeout;
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u16 status;
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2009-07-21 14:01:11 +09:00
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smc911x_phy_reset(dev);
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2008-04-15 13:08:20 +09:00
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2011-06-29 09:12:14 +09:00
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smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET);
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2008-04-15 13:08:20 +09:00
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mdelay(1);
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2011-06-29 09:12:14 +09:00
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smc911x_eth_phy_write(dev, 1, MII_ADVERTISE, 0x01e1);
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smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_ANENABLE |
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2010-12-24 05:40:12 +09:00
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BMCR_ANRESTART);
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2008-04-15 13:08:20 +09:00
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timeout = 5000;
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do {
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mdelay(1);
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if ((timeout--) == 0)
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goto err_out;
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2011-06-29 09:12:14 +09:00
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if (smc911x_eth_phy_read(dev, 1, MII_BMSR, &status) != 0)
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2008-04-15 13:08:20 +09:00
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goto err_out;
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2010-12-24 05:40:12 +09:00
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} while (!(status & BMSR_LSTATUS));
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2008-04-15 13:08:20 +09:00
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printf(DRIVERNAME ": phy initialized\n");
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return;
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err_out:
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printf(DRIVERNAME ": autonegotiation timed out\n");
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}
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2009-07-21 14:01:11 +09:00
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static void smc911x_enable(struct eth_device *dev)
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2008-04-15 13:08:20 +09:00
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{
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/* Enable TX */
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2009-07-21 14:01:11 +09:00
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smc911x_reg_write(dev, HW_CFG, 8 << 16 | HW_CFG_SF);
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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smc911x_reg_write(dev, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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smc911x_reg_write(dev, TX_CFG, TX_CFG_TX_ON);
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2008-04-15 13:08:20 +09:00
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/* no padding to start of packets */
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2009-07-21 14:01:11 +09:00
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smc911x_reg_write(dev, RX_CFG, 0);
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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smc911x_set_mac_csr(dev, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
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MAC_CR_HBDIS);
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2008-04-15 13:08:20 +09:00
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}
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2009-07-21 14:01:11 +09:00
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static int smc911x_init(struct eth_device *dev, bd_t * bd)
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2008-04-15 13:08:20 +09:00
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{
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2009-09-29 23:21:29 +09:00
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struct chip_id *id = dev->priv;
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2008-04-15 13:08:20 +09:00
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2009-10-28 08:49:47 +09:00
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printf(DRIVERNAME ": detected %s controller\n", id->name);
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2008-04-15 13:08:20 +09:00
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2009-07-21 14:01:11 +09:00
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smc911x_reset(dev);
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2008-04-15 13:08:20 +09:00
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/* Configure the PHY, initialize the link state */
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2009-07-21 14:01:11 +09:00
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smc911x_phy_configure(dev);
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2008-04-15 13:08:20 +09:00
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2009-11-11 17:03:09 +09:00
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smc911x_handle_mac_address(dev);
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2008-04-15 13:08:20 +09:00
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/* Turn on Tx + Rx */
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2009-07-21 14:01:11 +09:00
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smc911x_enable(dev);
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2008-04-15 13:08:20 +09:00
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return 0;
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}
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|
|
|
2012-05-20 21:22:55 +09:00
|
|
|
static int smc911x_send(struct eth_device *dev, void *packet, int length)
|
2008-04-15 13:08:20 +09:00
|
|
|
{
|
|
|
|
u32 *data = (u32*)packet;
|
|
|
|
u32 tmplen;
|
|
|
|
u32 status;
|
|
|
|
|
2009-07-21 14:01:11 +09:00
|
|
|
smc911x_reg_write(dev, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
|
|
|
|
TX_CMD_A_INT_LAST_SEG | length);
|
|
|
|
smc911x_reg_write(dev, TX_DATA_FIFO, length);
|
2008-04-15 13:08:20 +09:00
|
|
|
|
|
|
|
tmplen = (length + 3) / 4;
|
|
|
|
|
2008-04-29 21:35:08 +09:00
|
|
|
while (tmplen--)
|
2020-03-15 08:08:31 +09:00
|
|
|
smc911x_reg_write(dev, TX_DATA_FIFO, *data++);
|
2008-04-15 13:08:20 +09:00
|
|
|
|
|
|
|
/* wait for transmission */
|
2009-07-21 14:01:11 +09:00
|
|
|
while (!((smc911x_reg_read(dev, TX_FIFO_INF) &
|
|
|
|
TX_FIFO_INF_TSUSED) >> 16));
|
2008-04-15 13:08:20 +09:00
|
|
|
|
|
|
|
/* get status. Ignore 'no carrier' error, it has no meaning for
|
|
|
|
* full duplex operation
|
|
|
|
*/
|
2009-07-21 14:01:11 +09:00
|
|
|
status = smc911x_reg_read(dev, TX_STATUS_FIFO) &
|
|
|
|
(TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
|
|
|
|
TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
|
2008-04-15 13:08:20 +09:00
|
|
|
|
2008-04-29 21:35:08 +09:00
|
|
|
if (!status)
|
2008-04-15 13:08:20 +09:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
|
|
|
|
status & TX_STS_LOC ? "TX_STS_LOC " : "",
|
|
|
|
status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
|
|
|
|
status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
|
|
|
|
status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
|
|
|
|
status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2009-07-21 14:01:11 +09:00
|
|
|
static void smc911x_halt(struct eth_device *dev)
|
2008-04-15 13:08:20 +09:00
|
|
|
{
|
2009-07-21 14:01:11 +09:00
|
|
|
smc911x_reset(dev);
|
2014-10-12 01:42:58 +09:00
|
|
|
smc911x_handle_mac_address(dev);
|
2008-04-15 13:08:20 +09:00
|
|
|
}
|
|
|
|
|
2020-03-15 23:40:15 +09:00
|
|
|
static int smc911x_recv(struct eth_device *dev)
|
2008-04-15 13:08:20 +09:00
|
|
|
{
|
2015-04-08 15:41:06 +09:00
|
|
|
u32 *data = (u32 *)net_rx_packets[0];
|
2008-04-15 13:08:20 +09:00
|
|
|
u32 pktlen, tmplen;
|
|
|
|
u32 status;
|
|
|
|
|
2009-07-21 14:01:11 +09:00
|
|
|
if ((smc911x_reg_read(dev, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16) {
|
|
|
|
status = smc911x_reg_read(dev, RX_STATUS_FIFO);
|
2008-04-15 13:08:20 +09:00
|
|
|
pktlen = (status & RX_STS_PKT_LEN) >> 16;
|
|
|
|
|
2009-07-21 14:01:11 +09:00
|
|
|
smc911x_reg_write(dev, RX_CFG, 0);
|
2008-04-15 13:08:20 +09:00
|
|
|
|
2010-04-23 14:40:23 +09:00
|
|
|
tmplen = (pktlen + 3) / 4;
|
2008-04-29 21:35:08 +09:00
|
|
|
while (tmplen--)
|
2020-03-15 08:08:31 +09:00
|
|
|
*data++ = smc911x_reg_read(dev, RX_DATA_FIFO);
|
2008-04-15 13:08:20 +09:00
|
|
|
|
2008-04-29 21:35:08 +09:00
|
|
|
if (status & RX_STS_ES)
|
2008-04-15 13:08:20 +09:00
|
|
|
printf(DRIVERNAME
|
|
|
|
": dropped bad packet. Status: 0x%08x\n",
|
|
|
|
status);
|
|
|
|
else
|
2015-04-08 15:41:06 +09:00
|
|
|
net_process_received_packet(net_rx_packets[0], pktlen);
|
2008-04-15 13:08:20 +09:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2009-07-21 14:01:11 +09:00
|
|
|
|
2011-06-29 09:12:14 +09:00
|
|
|
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
|
|
|
|
/* wrapper for smc911x_eth_phy_read */
|
2016-08-09 01:28:38 +09:00
|
|
|
static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
|
|
|
|
int reg)
|
2011-06-29 09:12:14 +09:00
|
|
|
{
|
2016-08-09 01:28:38 +09:00
|
|
|
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
2020-03-15 23:43:20 +09:00
|
|
|
u16 val = 0;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!dev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
ret = smc911x_eth_phy_read(dev, phy, reg, &val);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
return val;
|
2011-06-29 09:12:14 +09:00
|
|
|
}
|
|
|
|
/* wrapper for smc911x_eth_phy_write */
|
2016-08-09 01:28:38 +09:00
|
|
|
static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
|
|
|
|
int reg, u16 val)
|
2011-06-29 09:12:14 +09:00
|
|
|
{
|
2016-08-09 01:28:38 +09:00
|
|
|
struct eth_device *dev = eth_get_dev_by_name(bus->name);
|
2020-03-15 23:43:20 +09:00
|
|
|
|
|
|
|
if (!dev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
return smc911x_eth_phy_write(dev, phy, reg, val);
|
2011-06-29 09:12:14 +09:00
|
|
|
}
|
2020-03-22 01:25:41 +09:00
|
|
|
|
|
|
|
static int smc911x_initialize_mii(struct eth_device *dev)
|
|
|
|
{
|
|
|
|
struct mii_dev *mdiodev = mdio_alloc();
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!mdiodev)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
|
|
|
|
mdiodev->read = smc911x_miiphy_read;
|
|
|
|
mdiodev->write = smc911x_miiphy_write;
|
|
|
|
|
|
|
|
ret = mdio_register(mdiodev);
|
|
|
|
if (ret < 0) {
|
|
|
|
mdio_free(mdiodev);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static int smc911x_initialize_mii(struct eth_device *dev)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2011-06-29 09:12:14 +09:00
|
|
|
#endif
|
|
|
|
|
2009-07-21 14:01:11 +09:00
|
|
|
int smc911x_initialize(u8 dev_num, int base_addr)
|
|
|
|
{
|
|
|
|
unsigned long addrl, addrh;
|
|
|
|
struct eth_device *dev;
|
2020-03-22 01:25:41 +09:00
|
|
|
int ret;
|
2009-07-21 14:01:11 +09:00
|
|
|
|
2020-03-15 23:14:18 +09:00
|
|
|
dev = calloc(1, sizeof(*dev));
|
|
|
|
if (!dev)
|
|
|
|
return -ENOMEM;
|
2009-07-21 14:01:11 +09:00
|
|
|
|
|
|
|
dev->iobase = base_addr;
|
|
|
|
|
2009-10-21 01:21:18 +09:00
|
|
|
/* Try to detect chip. Will fail if not present. */
|
2020-03-22 01:25:41 +09:00
|
|
|
ret = smc911x_detect_chip(dev);
|
|
|
|
if (ret) {
|
|
|
|
ret = 0; /* Card not detected is not an error */
|
|
|
|
goto err_detect;
|
2009-10-21 01:21:18 +09:00
|
|
|
}
|
|
|
|
|
2009-07-21 14:01:11 +09:00
|
|
|
addrh = smc911x_get_mac_csr(dev, ADDRH);
|
|
|
|
addrl = smc911x_get_mac_csr(dev, ADDRL);
|
2009-11-02 17:00:00 +09:00
|
|
|
if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
|
|
|
|
/* address is obtained from optional eeprom */
|
|
|
|
dev->enetaddr[0] = addrl;
|
|
|
|
dev->enetaddr[1] = addrl >> 8;
|
|
|
|
dev->enetaddr[2] = addrl >> 16;
|
|
|
|
dev->enetaddr[3] = addrl >> 24;
|
|
|
|
dev->enetaddr[4] = addrh;
|
|
|
|
dev->enetaddr[5] = addrh >> 8;
|
|
|
|
}
|
2009-07-21 14:01:11 +09:00
|
|
|
|
|
|
|
dev->init = smc911x_init;
|
|
|
|
dev->halt = smc911x_halt;
|
|
|
|
dev->send = smc911x_send;
|
2020-03-15 23:40:15 +09:00
|
|
|
dev->recv = smc911x_recv;
|
2009-07-21 14:01:11 +09:00
|
|
|
sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);
|
|
|
|
|
|
|
|
eth_register(dev);
|
2011-06-29 09:12:14 +09:00
|
|
|
|
2020-03-22 01:25:41 +09:00
|
|
|
ret = smc911x_initialize_mii(dev);
|
|
|
|
if (ret)
|
|
|
|
goto err_mii;
|
2011-06-29 09:12:14 +09:00
|
|
|
|
2009-11-12 22:35:08 +09:00
|
|
|
return 1;
|
2020-03-22 01:25:41 +09:00
|
|
|
|
|
|
|
err_mii:
|
|
|
|
eth_unregister(dev);
|
|
|
|
err_detect:
|
|
|
|
free(dev);
|
|
|
|
return ret;
|
2009-07-21 14:01:11 +09:00
|
|
|
}
|