u-boot-brain/tools/rkspi.c

93 lines
2.1 KiB
C
Raw Normal View History

// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
*
* See README.rockchip for details of the rkspi format
*/
#include "imagetool.h"
#include <image.h>
#include <rc4.h>
#include "mkimage.h"
#include "rkcommon.h"
enum {
RKSPI_SECT_LEN = RK_BLK_SIZE * 4,
};
static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
struct image_tool_params *params)
{
int sector;
unsigned int size;
size = params->orig_file_size;
rkcommon_set_header(buf, sbuf, ifd, params);
/*
* Spread the image out so we only use the first 2KB of each 4KB
* region. This is a feature of the SPI format required by the Rockchip
* boot ROM. Its rationale is unknown.
*/
if (params->vflag)
fprintf(stderr, "Spreading spi image from %u to %u\n",
size, params->file_size);
for (sector = size / RKSPI_SECT_LEN - 1; sector >= 0; sector--) {
debug("sector %u\n", sector);
memmove(buf + sector * RKSPI_SECT_LEN * 2,
buf + sector * RKSPI_SECT_LEN,
RKSPI_SECT_LEN);
memset(buf + sector * RKSPI_SECT_LEN * 2 + RKSPI_SECT_LEN,
'\0', RKSPI_SECT_LEN);
}
}
static int rkspi_check_image_type(uint8_t type)
{
if (type == IH_TYPE_RKSPI)
return EXIT_SUCCESS;
else
return EXIT_FAILURE;
}
/*
* The SPI payload needs to make space for odd half-sector layout used in flash
* (i.e. only the first 2K of each 4K sector is used).
*/
static int rkspi_vrec_header(struct image_tool_params *params,
struct image_type_params *tparams)
{
rkcommon_vrec_header(params, tparams);
/*
* Converting to the SPI format (i.e. splitting each 4K page into two
* 2K subpages and then padding these 2K pages up to take a complete
* 4K sector again) which will double the image size.
*/
params->file_size = ROUND(params->file_size, RKSPI_SECT_LEN) << 1;
/* Ignoring pad len, since we are using our own copy_image() */
return 0;
}
/*
* rk_spi parameters
*/
U_BOOT_IMAGE_TYPE(
rkspi,
"Rockchip SPI Boot Image support",
rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399 The RK3399 boot code (running as AArch64) poses a bit of a challenge for SPL image generation: * The BootROM will start execution right after the 4-byte header (at the odd instruction word loaded into SRAM at 0xff8c2004, with the 'RK33' boot magic residing at 0xff8c2000). * The default padding (during ELF generation) for AArch64 is 0x0, which is an illegal instruction and the .text section needs to be naturally aligned (someone might locate a 64bit constant relative to the section start and unaligned loads trigger a fault for all privileged modes of an ARMv8)... so we can't simply define the CONFIG_SPL_TEXT_BASE option to the odd address (0xff8c2004). * Finally, we don't want to change the values used for padding of the SPL .text section for all ARMv8 targets to the instruction word encoding 'nop', as this would affect all padding in this section and might hide errors that would otherwise quickly trigger an illegal insn exception. To deal with this situation, we modify the rkimage generation to - understand the fact that the RK3399 needs to pad the header to an 8 byte boundary using an AArch64 'nop' - the necessary logic to adjust the header_size (which controls the location where the payload is copied into the image) and to insert this padding (AArch64 insn words are always little-endian) into the image following the 4-byte header magic. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-03-15 20:08:43 +09:00
0,
NULL,
rkcommon_check_params,
rkcommon_verify_header,
rkcommon_print_header,
rkspi_set_header,
NULL,
rkspi_check_image_type,
NULL,
rkspi_vrec_header
);