mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-19 08:28:51 +09:00
55 lines
1.0 KiB
Plaintext
55 lines
1.0 KiB
Plaintext
![]() |
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||
|
/*
|
||
|
* Device Tree Include file for Marvell 98dx4521 family SoC
|
||
|
*
|
||
|
* Copyright (C) 2016 Allied Telesis Labs
|
||
|
*
|
||
|
* Contains definitions specific to the 98dx4521 SoC that are not
|
||
|
* common to all Armada XP SoCs.
|
||
|
*/
|
||
|
|
||
|
#include "armada-xp-98dx3236.dtsi"
|
||
|
|
||
|
/ {
|
||
|
model = "Marvell 98DX4251 SoC";
|
||
|
compatible = "marvell,armadaxp-98dx4251", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
|
||
|
|
||
|
cpus {
|
||
|
cpu@1 {
|
||
|
device_type = "cpu";
|
||
|
compatible = "marvell,sheeva-v7";
|
||
|
reg = <1>;
|
||
|
clocks = <&cpuclk 1>;
|
||
|
clock-latency = <1000000>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
soc {
|
||
|
internal-regs {
|
||
|
resume@20980 {
|
||
|
compatible = "marvell,98dx3336-resume-ctrl";
|
||
|
reg = <0x20980 0x10>;
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&sdio {
|
||
|
status = "okay";
|
||
|
};
|
||
|
|
||
|
&pinctrl {
|
||
|
compatible = "marvell,98dx4251-pinctrl";
|
||
|
|
||
|
sdio_pins: sdio-pins {
|
||
|
marvell,pins = "mpp5", "mpp6", "mpp7",
|
||
|
"mpp8", "mpp9", "mpp10";
|
||
|
marvell,function = "sd0";
|
||
|
};
|
||
|
};
|
||
|
|
||
|
&pp0 {
|
||
|
compatible = "marvell,prestera-98dx4251", "marvell,prestera";
|
||
|
interrupts = <33>, <34>, <35>, <36>;
|
||
|
};
|