2018-05-07 06:58:06 +09:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2012-10-04 15:46:02 +09:00
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/*
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2014-09-08 21:08:45 +09:00
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* Copyright (C) 2014 Marek Vasut <marex@denx.de>
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2012-10-04 15:46:02 +09:00
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*/
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2014-09-08 21:08:45 +09:00
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#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__
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#define __CONFIG_SOCFPGA_CYCLONE5_H__
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2012-10-04 15:46:02 +09:00
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2015-11-24 08:27:17 +09:00
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#include <asm/arch/base_addr_ac5.h>
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2012-10-04 15:46:02 +09:00
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2014-09-08 21:08:45 +09:00
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/* Memory configurations */
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2014-09-08 21:08:45 +09:00
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */
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2012-10-04 15:46:02 +09:00
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2014-09-08 21:08:45 +09:00
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/* Booting Linux */
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2015-07-22 13:18:19 +09:00
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#define CONFIG_LOADADDR 0x01000000
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2014-09-08 21:08:45 +09:00
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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2012-10-04 15:46:02 +09:00
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2014-09-08 21:08:45 +09:00
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/* Ethernet on SoC (EMAC) */
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2012-10-04 15:46:02 +09:00
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2014-09-08 21:08:45 +09:00
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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2014-06-10 15:11:04 +09:00
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2014-09-08 21:08:45 +09:00
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#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */
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