u-boot-brain/arch/arm/include/asm/arch-rockchip/gpio.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2015 Google, Inc
 */

#ifndef _ASM_ARCH_GPIO_H
#define _ASM_ARCH_GPIO_H

struct rockchip_gpio_regs {
	u32 swport_dr;
	u32 swport_ddr;
	u32 reserved0[(0x30 - 0x08) / 4];
	u32 inten;
	u32 intmask;
	u32 inttype_level;
	u32 int_polarity;
	u32 int_status;
	u32 int_rawstatus;
	u32 debounce;
	u32 porta_eoi;
	u32 ext_port;
	u32 reserved1[(0x60 - 0x54) / 4];
	u32 ls_sync;
};
check_member(rockchip_gpio_regs, ls_sync, 0x60);

#endif
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-07 06:58:06 +09:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
rockchip: gpio: Add rockchip GPIO driver This supports RK3288 at present. It does not implement functions or support for pull up/down. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-31 07:55:27 +09:00			`/*`
			`* (C) Copyright 2015 Google, Inc`
			`*/`

			`#ifndef _ASM_ARCH_GPIO_H`
			`#define _ASM_ARCH_GPIO_H`

			`struct rockchip_gpio_regs {`
			`u32 swport_dr;`
			`u32 swport_ddr;`
			`u32 reserved0[(0x30 - 0x08) / 4];`
			`u32 inten;`
			`u32 intmask;`
			`u32 inttype_level;`
			`u32 int_polarity;`
			`u32 int_status;`
			`u32 int_rawstatus;`
			`u32 debounce;`
			`u32 porta_eoi;`
			`u32 ext_port;`
			`u32 reserved1[(0x60 - 0x54) / 4];`
			`u32 ls_sync;`
			`};`
			`check_member(rockchip_gpio_regs, ls_sync, 0x60);`

			`#endif`