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https://github.com/brain-hackers/u-boot-brain
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171 lines
4.6 KiB
C
171 lines
4.6 KiB
C
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/*
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* Copyright 2014 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/iproc-common/armpll.h>
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#include <asm/iproc-common/sysmap.h>
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#define NELEMS(x) (sizeof(x) / sizeof(x[0]))
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struct armpll_parameters {
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unsigned int mode;
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unsigned int ndiv_int;
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unsigned int ndiv_frac;
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unsigned int pdiv;
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unsigned int freqid;
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};
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struct armpll_parameters armpll_clk_tab[] = {
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{ 25, 64, 1, 1, 0},
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{ 100, 64, 1, 1, 2},
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{ 400, 64, 1, 1, 6},
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{ 448, 71, 713050, 1, 6},
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{ 500, 80, 1, 1, 6},
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{ 560, 89, 629145, 1, 6},
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{ 600, 96, 1, 1, 6},
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{ 800, 64, 1, 1, 7},
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{ 896, 71, 713050, 1, 7},
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{ 1000, 80, 1, 1, 7},
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{ 1100, 88, 1, 1, 7},
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{ 1120, 89, 629145, 1, 7},
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{ 1200, 96, 1, 1, 7},
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};
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uint32_t armpll_config(uint32_t clkmhz)
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{
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uint32_t freqid;
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uint32_t ndiv_frac;
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uint32_t pll;
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uint32_t status = 1;
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uint32_t timeout_countdown;
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int i;
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for (i = 0; i < NELEMS(armpll_clk_tab); i++) {
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if (armpll_clk_tab[i].mode == clkmhz) {
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status = 0;
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break;
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}
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}
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if (status) {
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printf("Error: Clock configuration not supported\n");
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goto armpll_config_done;
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}
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/* Enable write access */
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writel(IPROC_REG_WRITE_ACCESS, IHOST_PROC_CLK_WR_ACCESS);
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if (clkmhz == 25)
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freqid = 0;
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else
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freqid = 2;
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/* Bypass ARM clock and run on sysclk */
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writel(1 << IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE |
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freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R |
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freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R |
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freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R |
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freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R,
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IHOST_PROC_CLK_POLICY_FREQ);
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writel(1 << IHOST_PROC_CLK_POLICY_CTL__GO |
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1 << IHOST_PROC_CLK_POLICY_CTL__GO_AC,
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IHOST_PROC_CLK_POLICY_CTL);
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/* Poll CCU until operation complete */
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timeout_countdown = 0x100000;
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while (readl(IHOST_PROC_CLK_POLICY_CTL) &
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(1 << IHOST_PROC_CLK_POLICY_CTL__GO)) {
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timeout_countdown--;
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if (timeout_countdown == 0) {
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printf("CCU polling timedout\n");
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status = 1;
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goto armpll_config_done;
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}
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}
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if (clkmhz == 25 || clkmhz == 100) {
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status = 0;
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goto armpll_config_done;
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}
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/* Now it is safe to program the PLL */
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pll = readl(IHOST_PROC_CLK_PLLARMB);
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pll &= ~((1 << IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH) - 1);
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ndiv_frac =
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((1 << IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH) - 1) &
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(armpll_clk_tab[i].ndiv_frac <<
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IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R);
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pll |= ndiv_frac;
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writel(pll, IHOST_PROC_CLK_PLLARMB);
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writel(1 << IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK |
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armpll_clk_tab[i].ndiv_int <<
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IHOST_PROC_CLK_PLLARMA__PLLARM_NDIV_INT_R |
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armpll_clk_tab[i].pdiv <<
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IHOST_PROC_CLK_PLLARMA__PLLARM_PDIV_R |
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1 << IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB,
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IHOST_PROC_CLK_PLLARMA);
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/* Poll ARM PLL Lock until operation complete */
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timeout_countdown = 0x100000;
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while (readl(IHOST_PROC_CLK_PLLARMA) &
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(1 << IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK)) {
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timeout_countdown--;
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if (timeout_countdown == 0) {
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printf("ARM PLL lock failed\n");
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status = 1;
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goto armpll_config_done;
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}
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}
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pll = readl(IHOST_PROC_CLK_PLLARMA);
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pll |= (1 << IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_POST_RESETB);
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writel(pll, IHOST_PROC_CLK_PLLARMA);
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/* Set the policy */
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writel(1 << IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE |
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armpll_clk_tab[i].freqid <<
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IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R |
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armpll_clk_tab[i].freqid <<
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IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R |
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armpll_clk_tab[i].freqid <<
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IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R |
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armpll_clk_tab[i+4].freqid <<
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IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R,
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IHOST_PROC_CLK_POLICY_FREQ);
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writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_CORE0_CLKGATE);
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writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_CORE1_CLKGATE);
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writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_ARM_SWITCH_CLKGATE);
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writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_ARM_PERIPH_CLKGATE);
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writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_APB0_CLKGATE);
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writel(1 << IHOST_PROC_CLK_POLICY_CTL__GO |
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1 << IHOST_PROC_CLK_POLICY_CTL__GO_AC,
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IHOST_PROC_CLK_POLICY_CTL);
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/* Poll CCU until operation complete */
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timeout_countdown = 0x100000;
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while (readl(IHOST_PROC_CLK_POLICY_CTL) &
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(1 << IHOST_PROC_CLK_POLICY_CTL__GO)) {
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timeout_countdown--;
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if (timeout_countdown == 0) {
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printf("CCU polling failed\n");
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status = 1;
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goto armpll_config_done;
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}
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}
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status = 0;
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armpll_config_done:
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/* Disable access to PLL registers */
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writel(0, IHOST_PROC_CLK_WR_ACCESS);
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return status;
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}
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