mirror of
https://github.com/brain-hackers/u-boot-brain
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93 lines
2.2 KiB
C
93 lines
2.2 KiB
C
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/*
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* (C) Copyright 2012
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* Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef __MV886352_H
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#define __MV886352_H
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#include <common.h>
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/* PHY registers */
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#define PHY(itf) (itf)
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#define PHY_CTRL 0x00
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#define PHY_100_MBPS 0x2000
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#define PHY_1_GBPS 0x0040
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#define AUTONEG_EN 0x1000
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#define AUTONEG_RST 0x0200
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#define FULL_DUPLEX 0x0100
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#define PHY_PWR_DOWN 0x0800
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#define PHY_STATUS 0x01
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#define AN1000FIX 0x0001
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#define PHY_SPEC_CTRL 0x10
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#define SPEC_PWR_DOWN 0x0004
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#define AUTO_MDIX_EN 0x0060
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#define PHY_1000_CTRL 0x9
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#define NO_ADV 0x0000
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#define ADV_1000_FDPX 0x0200
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#define ADV_1000_HDPX 0x0100
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#define PHY_PAGE 0x16
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#define AN1000FIX_PAGE 0x00fc
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/* PORT or MAC registers */
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#define PORT(itf) (itf+0x10)
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#define PORT_STATUS 0x00
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#define NO_PHY_DETECT 0x0000
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#define PORT_PHY 0x01
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#define RX_RGMII_TIM 0x8000
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#define TX_RGMII_TIM 0x4000
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#define FLOW_CTRL_EN 0x0080
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#define FLOW_CTRL_FOR 0x0040
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#define LINK_VAL 0x0020
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#define LINK_FOR 0x0010
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#define FULL_DPX 0x0008
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#define FULL_DPX_FOR 0x0004
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#define NO_SPEED_FOR 0x0003
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#define SPEED_1000_FOR 0x0002
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#define SPEED_100_FOR 0x0001
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#define SPEED_10_FOR 0x0000
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#define PORT_CTRL 0x04
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#define FORWARDING 0x0003
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#define EGRS_FLD_ALL 0x000c
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#define PORT_DIS 0x0000
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struct mv88e_sw_reg {
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u8 port;
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u8 reg;
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u16 value;
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};
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int mv88e_sw_reset(const char *devname, u8 phy_addr);
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int mv88e_sw_program(const char *devname, u8 phy_addr,
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struct mv88e_sw_reg *regs, int regs_nb);
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#endif
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