2018-11-02 23:21:03 +09:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* K3: Architecture common definitions
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*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#include <asm/armv7_mpu.h>
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2020-08-06 02:14:23 +09:00
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#include <asm/hardware.h>
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2018-11-02 23:21:03 +09:00
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2020-08-06 02:14:19 +09:00
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#define J721E 0xbb64
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arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Add support for detection J7200 SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-06 02:14:21 +09:00
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#define J7200 0xbb6d
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2020-08-06 02:14:19 +09:00
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2020-01-11 04:35:21 +09:00
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struct fwl_data {
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const char *name;
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u16 fwl_id;
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u16 regions;
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};
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2018-11-02 23:21:03 +09:00
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void setup_k3_mpu_regions(void);
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2019-08-16 05:55:28 +09:00
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int early_console_init(void);
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2019-12-31 19:19:55 +09:00
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void disable_linefill_optimization(void);
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2020-01-11 04:35:21 +09:00
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void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
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2020-02-12 17:25:04 +09:00
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void start_non_linux_remote_cores(void);
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int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
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2020-03-10 20:20:58 +09:00
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void k3_sysfw_print_ver(void);
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2020-05-18 14:57:22 +09:00
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void spl_enable_dcache(void);
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2020-08-06 02:14:17 +09:00
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void mmr_unlock(phys_addr_t base, u32 partition);
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2020-08-06 02:14:23 +09:00
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bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
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